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I'm getting a wrong "CombLoopException" when passing a complex Record (Bundle based on key-value pairs) as UInt and converting the UInt back to the Record by using asUInt() and asTypeOf(...).

When connecting the two Records directly without the UInt conversion step, there is no CombLoopException. I've spent several days trying to solve/reproduce the issue. This is why I am quite sure there should be no CombLoopException.

Unfortunately, there is no small code snippet I could provide to reproduce the error, as I'm working on a custom modification of the Rocket Chip Generator and the problem only occurs on a complex modification of a Bundle.

My question: How do I use the "--no-check-comb-loops" option to avoid the CombLoopException? Is there a way to add this option in the build.sbt?

I'd also like to give a detailed description on this particular case if wanted in order to help fixing this rare issue: Disable FIRRTL pass that checks for combinational loops

larluc
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  • Synthesis tools report feedback around combinational logic. Vivado reports something like 'latch inferred'. If synthesis does NOT report it as a latch you are probably ok. Grep the log file for the string 'latch'. You can also examine the post route utilization report for the existence of a latch macro or primitive. The bigger point is you have better tools than lint; use them. – Mikef Mar 22 '22 at 03:33

1 Answers1

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It obviously depends on your specific code but I would still suggest trying to avoid creating the false combinational loop. It is likely true that it is a false loop, but tools like Verilator will likely struggle with it as well.

That being said, you can disable the check by passing --no-check-comb-loops to the FIRRTL step of compilation (also known as the Verilog-generation step). In rocket-chip, it depends on which simulation directory you're doing, but in vsim it is here, in emulator it is here.

Jack Koenig
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