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I am developing an embedded program for an intel i386, and I am trying to figure out how to use the hardware timer. I have read here (and other places) that the timer interrupt is 0x08, but this page (And various other sources) say that the first 32 interrupts are reserved for exceptions, and interrupt 0x08 specifically is for double fault. Which is true? How can I setup a timer interrupt handler, using either assembly or very low-level C with no operating system calls?

I am developing a simple operating system to learn about operating system development, so I don't have access to anything like Linux or system calls (unless I implement the system calls myself. But creating a fully POSIX-compliant OS is far outside the scope of this project, so I would rather stick to simple, if slightly hacky, solutions).

If it matters, I am running this on QEMU, not an actual physical i386.

ItsAmy
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    You normally remap the interrupts. See [osdev article](http://wiki.osdev.org/8259_PIC). – Jester Feb 13 '17 at 16:30
  • Are you intending to write a real mode OS or a Protected mode one? I'm assuming protected mode. – Michael Petch Feb 13 '17 at 20:24
  • @MichaelPetch Because I don't know what that means, I suppose I should assume the same thing you did. (I'll look into what it means and get back to you) – ItsAmy Feb 14 '17 at 02:38
  • @MichaelPetch: Upon further research, definitely protected mode. – ItsAmy Feb 14 '17 at 02:49
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    Then the reason for the overlap is indirectly suggested in the accepted answer, and the solution for protected mode (if you don't ever intend to change back to real mode) is at the link in @Jester 's comment. You remap the master PIC from a base of 0x08 to somewhere outside the reserved interrupts (interrupt vector 0x20 and above). The slave PIC (on PC/AT +) by default is set to a base of 0x70 well outside the reserved area. Had IBM honored the Intel 8086 specs by the time the first IBM PC was introduced then the problem would never have existed. – Michael Petch Feb 14 '17 at 03:02

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Most people assume this (Timer using INT8) a design flaw in the original IBM PC architecture. To (partially) protect the guilty, the original 8088 really didn't use this vector - It was, however, marked as "reserved" by Intel from the very beginning.

Before protected mode was invented, that conflict didn't really occur (CPUs < 80286 didn't use this double fault). In most of today's PCs, the 8259 PIC is still there, albeit not as separate chip, but hidden somewhere in the PCs chip set. Thankfully, INT08 for the timer interrupt is not carved in hardware, but rather initialized into the PIC by the PC BIOS. So protected mode OSs can easily re-map the PIC interrupts to other, more convenient places in order to avoid the conflict. To my knowledge, only DOS and other early operating systems assume the timer interrupt on INT8.

tofro
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  • It's the other way around: the IRQ0 was allowed to be mapped to the vector 08 because it was unused (it is not a flaw of the 8086). The #DF [was not present on the original 8086 (Virtual PDF Page 40)](https://edge.edx.org/c4x/BITSPilani/EEE231/asset/8086_family_Users_Manual_1_.pdf). It would be nice to include such scheme in your question :) – Margaret Bloom Feb 13 '17 at 17:19
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    @MargaretBloom : The reality is that vector 08h wasn't "unused*. In fact it was listed as **reserved** all the way back to Intel's design specification documents. Intel on the 8086/8088 reserved the first 32 interrurpt vectors. The problem is that IBM ignored Intel and actually used reserved vectors for the 8259. This caused the problems when the 80286 and 80386 came out (Coprocessor vector clashed and the 8259A clashed). Had IBM not designed a flawed system from the start and conformed to Intel this cluster frack wouldn't have happened – Michael Petch Feb 13 '17 at 17:46
  • @MargaretBloom : If you review the [iAPX 86 and 88 Intel manual](http://www.mirrorservice.org/sites/www.bitsavers.org/pdf/intel/_dataBooks/1981_iAPX_86_88_Users_Manual.pdf) from 1981, page 4-17 is of particular interest is this passage _As shown in figure 4-18, the first five interrupt vectors are associated with the software-initiated interrupts and the hardware non-maskable interrupt (NMI). The next 27 interrupt vectors are reserved by Intel and should not be used if compatibility with future Intel products is to be maintained._ – Michael Petch Feb 13 '17 at 17:50
  • continued... _The remaining interrupt vectors (vectors 32 thorugh 255) are available for user interrupt routines._ – Michael Petch Feb 13 '17 at 17:50
  • It has been generally agreed upon that Intel from the outset in 1976 had reserved the first 32 vectors and the fault for the 8259 being mapped there, and that BIOS interrupts existed >= int 10h <= int 1fh was a failure of IBM's PC design. – Michael Petch Feb 13 '17 at 17:57
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    @MargaretBloom This is exactly what my answer says: INT08 was "unused" by Intel, but "marked as reserved". But "allowed" is kind of untrue. I don't consider using something that is reserved by the CPU vendor is "allowed". – tofro Feb 13 '17 at 18:05
  • On a side note: The [1979 Intel 8086 Family User document](http://bitsavers.informatik.uni-stuttgart.de/pdf/intel/8086/9800722-03_The_8086_Family_Users_Manual_Oct79.pdf) makes the same claim but they word it differently on Page 2-14: _Two areas in extreme low and high memory are dedicated to specific processor functions or are reserved by Intel Corporation for use by Intel. hardware and software products. As shown in figure 2-21, the location are: OH throgh 7FH (128 bytes) and FFFFOH through FFFFFH (16 bytes)._ – Michael Petch Feb 13 '17 at 18:35
  • Continued: _These areas are used for interrupt and system reset processing 8086 and 8088 application systems should not use these areas for any other purpose. Doing so may make these systems incompatible with future Intel products._ . Of course memory addresses OH through 7FH (128 bytes) are the first 32 4-byte interrupt vectors. Figure 2-21 shows the first 20 bytes (0h to 13h) are **dedicated**, 014h to 7fh are **reserved** . The **dedicated** ones coincide with the first 5 interrupts mentioned in the 1981 document. – Michael Petch Feb 13 '17 at 18:35
  • @MichaelPetch Thanks for the detailed comments, but saying that they were reserved would have sufficed (we practically linked the same document and I misread the scanned figure) :) @ tofro, I thought you were blaming the 8086, but I must have read the answer too quickly, I apologise. You are absolutely correct of course! I still believe it would be nice to include an official reference in your answer. – Margaret Bloom Feb 13 '17 at 19:47