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I am not able to relate to the use case of GIC interrupt bypass in linux. Is there a acutal usecase for it?

artless noise
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    Another use (depending on what you are talking about) is that the nIRQ line may drive to a core directly. The **GIC** is a multi-core controller with a *distributor*. With *bypass*, the distributor is not used and the CPU with the nIRQ services the peripheral. – artless noise Nov 14 '13 at 18:58
  • @artlessnoise From ARM cortex-a9 documentation - PPI[0]"In legacy FIQ mode the legacy nFIQ pin, on a per Cortex-A9 processor basis, bypasses the interrupt distributor logic and directly drives interrupt requests into the Cortex-A9 processor. When a Cortex-A9 processor uses the Interrupt Controller, rather than the legacy pin in the legacy mode, by enabling its own Cortex-A9 processor interface, the legacy nFIQ pin is treated like other interrupt lines and uses ID28" - So it seems like it uses PPI[0] to route the legacy interrupt. – Nuetrino Nov 29 '13 at 12:22
  • @artlessnoise I think i figured it out. The GIC is bypassed in the Legacy mode and the interrupt is sent to the CPU interface directly ( by passing the Distributor logic). This can be set as one of the configurations in the GIC ( can be done by setting some bits in the ICCICR register). It is called the legacy mode. More information can be found in http://www.systems.ethz.ch/sites/default/files/file/aos2012/ReferenceMaterial/InterruptHandling/GIC_architecture_spec_v1_0.pdf – Nuetrino Nov 29 '13 at 12:37
  • mSO, See Nuetrino's question [What are legacy interrupt](http://stackoverflow.com/questions/20238921/what-are-legacy-interrupts); it is related. Probably you have already solved your issue and moved on... – artless noise Nov 29 '13 at 14:22

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