VHDL
The VHSIC Hardware Description Language (VHDL) is a hardware description language (HDL) that can model the behavior and structure of digital systems at multiple levels of abstraction, ranging from the system level down to that of logic gates, for design entry, documentation, and verification purposes. Since 1987, VHDL has been standardized by the Institute of Electrical and Electronics Engineers (IEEE) as IEEE Std 1076; the latest version of which is IEEE Std 1076-2019. To model analog and mixed-signal systems, an IEEE-standardized HDL based on VHDL called VHDL-AMS (officially IEEE 1076.1) has been developed.
| Paradigm | concurrent, reactive, dataflow |
|---|---|
| First appeared | 1980s |
| Stable release | IEEE 1076-2019
/ 23 December 2019 |
| Typing discipline | strong |
| Filename extensions | .vhd |
| Website | IEEE VASG |
| Dialects | |
| VHDL-AMS | |
| Influenced by | |
| Ada, Pascal | |
| |
VHDL is named after the United States Department of Defense program that created it, the Very High Speed Integrated Circuits Program (VHSIC). In the early 1980s, the VHSIC Program sought a new HDL for use in the design of the integrated circuits it aimed to develop. The product of this effort was VHDL Version 7.2, released in 1985. The effort to standardize it as an IEEE standard began in the following year.