System Console is a flexible system-level debug tool that helps designers quickly and efficiently debug their design while the design is running at full speed in an FPGA.
System Console is a flexible system-level debug tool that helps designers quickly and efficiently debug their design while the design is running at full speed in an FPGA. System Console enables designers to send read and write system-level transactions into their Qsys system to help isolate and identify problems. It also provides a quick and easy way to check system clocks and monitor reset states, which can be particularly helpful during board bring-up. In addition, System Console allows designers to create their own custom verification or demonstration tool using graphical elements, such as buttons, dials, and graphs, to represent many system-level transactions and monitor the processing of data.
