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Questions tagged [program-counter]

The program counter (PC), commonly called the instruction pointer (IP) in Intel x86 and Itanium microprocessors, and sometimes called the instruction address register (IAR), the instruction counter, or just part of the instruction sequencer, is a processor register that indicates where a computer is in its program sequence.

The program counter (PC), commonly called the instruction pointer (IP) in Intel x86 and Itanium microprocessors, and sometimes called the instruction address register (IAR), the instruction counter, or just part of the instruction sequencer, is a processor register that indicates where a computer is in its program sequence.

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Meaning of pc in gdb (alias?)

I have a small x86_64 assembly program and I don't see any register specifically called pc (program counter?), though there is the instruction pointer, in the rip register However, when I type in: >>> p/x $rip $15 = 0x4000c5 >>> p/x $pc $16 =…
carl.hiass
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Break at address "0xXXXXXX" with no debug information available, or outside of program code

Configuration: Using Nucleo-L476RG. Using GNU ARM Eclipse. I have generated a minimalist code from STM32CubeMX. I have flashed J-link driver in my on board ST-Link. Have been trying to run debugger for my code but my program counter is not setting…
Abhishek Behera
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Find program counter of process in kernel

I'm trying to track the value of the PC of a particular process within the kernel. To do this, I looked at the kernel source and figured out that the pc is being stored inside task_struct->stack and that to make sense of the stack, I need to type…
Guru Prasad
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What does RISC-V do on PC overflow?

What happens on a RISC-V CPU when the program counter (PC) overflows? For example, what happens on RV32G IALIGN = 32 after a (32-bit) NOP at 0xFFFF’FFFC has been executed? Or on RV32GC after a 16-bit NOP at 0xFFFF’FFFE has been executed? The easiest…
Alex Shpilkin
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PIC 16F84 PCLATH Bit3+4 unnecessary for CALL/GOTO?

I am trying to simulate the PIC16F84 and now need to implement PCL / PCLATH registers. The PIC16F84 has 1K of Program memory. The PCL is 8Bit wide, so in this case Bit 0 and 1 of PCLATH is used to switch between the four Pages each having a size of…
totallynotatallno
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"PC" on Mips Reference Sheet

I'm practicing converting a Mips instruction (beq $t5, $s0, loop) to binary based on the Mips reference sheet and there are a series of instructions (PC=PC + 4 + branch address) for computing the immediate value for an "I" type instruction and it…
kocho84
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Why are we adding 0 to a double void pointer here?

For context, this is code called from a bootloader that is supposed to boot into the main application. This snippet is from a function with an argument uintptr_t address that specifies the address of where the main application has been written to. I…
Capn Jack
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How to get the instruction pointer in x86_64 without 0x00 or 0xFF bytes?

Is there a way to access the value in the instruction pointer (RIP) without using a call followed by a pop in assembly language? Or is there a machine code opcode that can do it? I have been googling with no clear results. My problem is that I…
Madness
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How to save program counter address without using J-Type instructions in MIPS architecture

I have to implement jal instruction as pseudo-instruction without using J-Type instructions. I can implement it with jr but I know that jal stores current PC+8 in $ra. How can I implement that? How can I store PC address in ra without J-type?
Vlad
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Where the program counter goes after returning the interrupt handler?

Hi I am wondering where the program counter goes when the program returns from interrupt service routine? I know when the interrupt event occurs the PC is pushed into the stack. But what address is pushed into the stack the next one or the same…
Radoslaw Krasimirow
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How to get current program counter inside mprotect handler and update it

I want to get the current program counter(PC) value inside mprotect handler. From there I want to increase the value of PC by 'n' number of instruction so that the program will skip some instructions. I want to do all that for linux kernel version…
azizulhakim
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Trying to understand an assembly line of ARM7

I have this assembly line : 01000AD8: 979FF103 LDRLS PC,[PC,R3,LSL #2] With PC = 0x01000AD8 R3 = 0x00000008 CDPS = 800000D3 (so C=0, Z=0) When I execute this line, the new value for PC should be(if I understand LDRLS correctly*) PC =…
Martin Allard
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Does the fetch phase in the x86 CPU increment eip(PC) to the next instruction?

During the fetch phase of the instruction cycle in an x86 CPU, I've wondered if the eip(PC) register gets incremented to store the next instruction at the end of that phase(fetch phase) or after the execution phase? I know that MIPS CPUs increment…
AngryJohn
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Why the Frame's value represents the program counter + 1 in the pc function

I am confused when studying the pkg/errors. In the file stack.go, we can see the comment about the struct Frame as below: // Frame represents a program counter inside a stack frame. // For historical reasons if Frame is interpreted as a uintptr //…
RocketMan
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in ARMv6, why the value of PC is current instruction plus 8?

what if the stages of pipeline is not 3, such as in ARM1156T2-S (also is ARMv6), it has 9 stages: Fe1 Fe2 De Iss Fe3 Sh ALU Sat WBex the PC is still address of current instruction plus 8?
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