Questions tagged [memory-mapped-io]

27 questions
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Is there an elegant way of parsing a byte buffer of dynamic length into a struct?

Background As sketched up here https://godbolt.org/z/xaf95qWee (mostly same as code below), I am consuming a library that offers a shared memory ressource in form of a memory-mapped file. For statically sized messages the read method can very…
S. Jung
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How can I access memory-mapped GPIO registers with golang on Windows?

I am working with a piece of harware, that addresses LEDs through GPIOs accessible only through memory-mapped IO (mmio registers). On Linux, I managed to set the values pretty simple, by opening the documented address through /dev/mem: var err…
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Better way to write a few MMIO register bits in RISC-V assembly?

To configure UART tx, water mark (0 to 7) has to be written on memory mapped tx control register on bit position [18:16]. My RISC-V assembly function first reads the present control register value, perform a bitwise AND with mask to clear bits…
RRON
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Poor MMIO performance with non-temporal loads on Intel Xeon

I'm seeing poor memory (WC) read performance with the vmovntdqa non-temporal load instruction on Intel Xeon E-2224 systems, but excellent performance on AMD EPYC 3151 systems. Why such a huge difference, and is there anything I could do about it? It…
Jaakko Salo
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How to put a variable at a specific memory location in SDCC

For low-level programming, sometimes it's necessary to say, at a given memory location, this is where my address is. For this post, the example is the PIR1 register in the PIC16F886 and related microcontrollers. It's always found at address…
Lorraine
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How to access MMIO registers in Linux kernel with `ioremap()`?

I am working on an embedded Linux system (kernel v5.10.24). And I want to access registers in the SoC which are MMIO based. So I worked a test module to access them, as follows, #include #include #include…
wangt13
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any known issue with ioread64() / iowrite64() on a PCIe bus?

I have a similar issue mentioned here but with a different behavior. We have an FPGA (from Altera) acts as a 32KB memory on a PCIe bus of IMX8M-Plus CPU (ARM Cortex-A53). I wrote a simple driver to access FPGA's memory. As you can see from lspci…
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polling through mips doesnt work after the first time you run the program (MIPS)

i made a polling sequence and when i first open the program (on QtSpim) it polls perfectly, when i reinitialize and reload the program a second time it just falls through and doesnt poll at all and have to close and reopen QTSpim for the program to…
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Memory-mapped C++ objects non hardware members

I am developing a driver for a piece of memory mapped hardware using C++ and I defined a class that represents this device. It looks something like this: class device { method1(); method2(); private: device_register reg1; device_register…
effendi
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What exactly is memory mapped io and port based io

Well I have some confusions about memory mapped io and port based io. Questions are:- In port based io if I write to a port will it affect the corresponding memory address or not and vise versa. Does x86 uses port based io or memory mapped io.(I…
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How to have a constexpr pointer to CMSIS defined hardware peripheral?

I want to use constexpr instead of #defines wherever possible, for type safety and namespace features. Unfortunately, I get this error: 'reinterpret_cast(1073756160)' is not a constant expression when trying. #include //…
Cameron Tacklind
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reading Memory-Mapped IO registers How to (from datasheet) and using them in mmap

I have intel system with Ethernet controller: Intel Corporation 82579LM Gigabit Network Connection (Lewisville) (rev 04). I have downloaded the datasheet like datasheet for Intel ® 82579 Gigabit Ethernet PHY Now I am reading resource0 of pci…
user786
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How can I map device's IO memory to userspace using `mmap()`?

I'm browsing through LDD3 and I have difficulty understanding a chapter about mmap(). Here is a code snipped from the book: static int simple_remap_mmap(struct file *file, struct vm_area_struct *vma) { if (remap_pfn_range(vma, vma->vm_start,…
bielu000
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"busybox devmem
" returns 0xffffffff for all addresses on Nvidia Jetson Orin Nano, throws kernel error

I'm trying to configure a GPIO pin on an SoC running Linux (Jetson Orin Nano), but there's no API provided to set things like pull resistors, so we have to look up the physical addresses of the control registers and write to them directly. In order…
Timothy Miller
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rocket chip riscv rtl spike simulation

I use mmio axi4 for data store, the rtl simulation in vcs is ok, but in spike, I got error like this: (base) ubuntu@ubuntu:~/riscv/software$ spike math.elf Access exception occurred while loading payload math.elf: Memory address 0x60000000 is…
paopaopoo
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