Questions tagged [bus]

A Bus is a physical device used to connect different functional blocks of a computer or a different computers in order to communicate them together. Also Bus is a data type in MATLAB language used to bundle some data to virtual (just for useful rendering) or non-virtual (for contiguous memory allocation) structure.

The Bus advantages (as physical device) over wires are reducing the needed number of wires and catholicity. The main characteristics of Buses are width (amount of bits can be transmitted at once) and frequency (work speed).

The Bus as a structure of MATLAB language used to bundle different variables (or signals, for example in Simulink) in one structure. Can be used as virtual bus just for convenient accessing to variables and for reducing number of wires at Simulink diagram or as non-virtual - Nonvirtual buses use contiguous memory allocation for variables.

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Apply censorship to LIN Slave transmitted frames before they reach Master via CAPL

In my current setup, I have a LIN Master and a LIN slave. The schedule table is unconditional, and never re-negotiated: Master Frame Slave Frame Slave Frame I'm using physical bus and simulated Master (physical Slave). My goal is to apply…
Daemon Painter
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Enabling bus mastering/BMDMA in gem5 FS mode

I am building a custom full system configuration (largely influenced by ARM in configs/FSConfig.py) and am running into an issue where the kernel hangs on boot, being unable to access the disk image to mount the root filesystem. Looking at the…
Josh
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Can a non-enumerated device conduct DMA operations?

PCIe devices can read or write to memory, i.e. can do DMA without requiring a device driver. If I remember correctly, if you flash a device's firmware (let's say an FPGA device) and input 0xFFFF as device and vendor ID, the device won't be…
Jordan T.
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Query asynchronous operation state within a micro service architecture

We are in the process of redesigning few our REST API endpoints to transition to a micro service architecture. Here we are working on the endpoint /invitations/:id/confirm. This endpoint creates a User, Account using the provided Invitation. We…
user4478810
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Azure Service Duplicate Message Forward

I am working in a project which involves Azure Service Bus Queue to place all incoming messages. We used the in-built capability of the Queue for detecting and removing duplicate messages and it works perfect! Now we need to forward the duplicate…
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GDBus equivalent for dbus_connection_setup_with_g_main()

I am migrating code from dbus-glib to GDBus as the former is deprecated. I am not able to find an equivalent function for dbus_connection_setup_with_g_main() in…
D S
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Verification of timestamps of messages sent over the CAN Bus

In order to provide message freshness in the CAN-Bus a timestamp can be added to the message. A receiver can then check the timestamp (may be truncated) and compare it to his own local timer in order to decide whether he wants to proceed the…
Benjamin
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Can RDMA be used to write to memory-mapped registers?

How are memory accesses to memory-mapped registers intercepted and routed to the correct device (rather than letting them go through to RAM)? Is it possible to use RDMA to write to a memory-mapped register? I suppose the answer to this question is…
Jack Humphries
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PCIe bus latency when using ioctl vs read?

I've got a hardware client1 who's line of data acquisition cards I've written a Linux PCI kernel driver for. The card can only communicate 1-4 bytes at a time depending on how the user specifies to utilize it, given this, I utilize ioctl for some of…
txtechhelp
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AXI Bus security related protocol

In AXI Bus protocol, Can anyone explain me about the ARPROTS[2:0] and AWPROTS[2:0] ? Like each bit corresponds to what? and what is privileged access and non-privileged? what is data access and instruction access?
srinivas
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Why are the CPU Physical Address Space and Bus Address Space different?

I'm reading about DMA and it refers to the following address spaces: CPU Virtual Address Space CPU Physical Address Space Bus Address Space I understand why the virtual and physical address space is different... by why is there a mapping required…
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What is a physical address and virtual address? and how do they work?

And by the by, what does "svchost.exe error" imply when "the memory cannot be written because of 0xc000000e failure"? Thanks as usual!
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SpringCloud-Bus does not refresh using webhook client

SpringCloud uses spring-cloud-config-monitor to automatically refresh the configuration of the message bus. It uses the webhook of github. After each update configuration is completed, the result of the request is: github webhook response,However,…
licoycn
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Bus error in C Program on Unix machine

I'm fairly unexperienced with C and am running into a "Bus error" that I cannot understand the cause of. I had never heard of gdb but came across it on this forum and tried using it on my problem program and got the following output: % gdb Proc1…
Mark
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Discover if a Simulink signal is a bus programmatically

I am using MATLAB 2013b, and I am attempting to write a script that will automatically wire up ToWorkspace blocks to a selected set of signals. I can handle finding/getting handles to the signals, adding the blocks, setting the variable names, and…