Questions tagged [arm]

This tag is used for questions related to the ARM (Advanced RISC Machine) family of computers; that is machines or electronics running on ARM processor cores or systems using an ARM core. For Azure-related questions, use [azure-resource-manager].

ARM (formerly Advanced RISC Machine and Acorn RISC Machine) is a reduced instruction set computer (RISC) instruction set architecture (ISA) developed by Acorn Computers and extended by ARM Holdings. The ARM architecture is the most widely used 32-bit instruction set architecture in numbers produced.

More information can be found in the Wikipedia article on ARM Architecture and the ARM Reference Documents.

There are many different variants of the ARM assembler that have evolved over time. The notation can be confusing. For instance, arm7 and armv7, are completely different. The first is a CPU implementation; the second is a CPU architecture. The architecture, also called a family, is a set of machine instructions (or ISA for instruction set architecture) that are generally compatible. See: Wikipedia's list of ARM microarchitectures for more.

Related tags:

  • - the first version consisted of a reduced set of 16bit instructions. thumb2, introduced with armv6, includes a mix of 16 and 32bit instructions, extended further in armv7 such that it can do most things the normal ARM ISA can.
  • - a SIMD extension for ARM CPUs
  • - an embedded ISA of the armv7 that only supports thumb2.
  • - the application version of armv7 ISA.
  • - the eighth arm architecture (armv8) includes 64bit registers.
  • - a security feature in some armv6, armv8 and armv7 CPUs.
  • - bus or interconnect specification used between CPUs and peripherals.
  • - SWD (Serial Wire Debug) is a light weight version of JTAG designed for ARM MCUs.

Do not create tags such as . Often those posts apply to other cortex-m CPUs and/or the difference between the versions is important to understand. Also newer future CPUs may extend a specific CPU and questions in that tag maybe relevant.

If you are only posting to the tag try to give some specifics about the system you are using.

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When are GAS ELF the directives .type, .thumb, .size and .section needed?

I'm working on an assembly program for an ARM Cortex-M3 based microcontroller (Thumb 2 instruction set), using GNU as. In some example code I find directives like .size, .section and .type which I understand are ELF directives. As an example: …
user1481860
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Coding for ARM NEON: How to start?

I'm looking to optimize C++ code (mainly some for loops) using the NEON capability of computing 4 or 8 array elements at a time. Is there some kind of library or set of functions that can be used in C++ environment? I use Eclipse IDE in Linux Gentoo…
Pedro Batista
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Edit (patch) a binary file in IDA Pro

i would like to know how to edit a binary file in ida pro (i just need to change one instruction!) (its ARM binary) thanks
lol
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Cortex A9 NEON vs VFP usage confusion

I'm trying to build a library for a Cortex A9 ARM processor(an OMAP4 to be more specific) and I'm in a little bit of confusion regarding which\when to use NEON vs VFP in the context of floating point operations and SIMD. To be noted that I know the…
celavek
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Is it possible to compile LLVM libraries to android/ARM

I'm fascinated by the Pure algebraic/functional language. The Pure interpreter uses the LLVM JIT compiler as its backend. I would like to compile Pure so that it runs on Android(ARM). Pure has a dependency on the LLVM JIT. So I need to compile LLVM…
Sid Kshatriya
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Do Kernel pages get swapped out?

Pertaining to the Linux kernel, do "Kernel" pages ever get swapped out ? Also, do User space pages ever get to reside in ZONE_NORMAL ?
TheLoneJoker
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What are the semantics of ADRP and ADRL instructions in ARM assembly?

ADRP Address of 4KB page at a PC-relative offset. ADRL Load a PC-relative address into a register. It is similar to the ADR instruction. ADRL can load a wider range of addresses than ADR because it generates two data processing…
sherlock
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Using objdump for ARM architecture: Disassembling to ARM

I have an object file and am trying to disassemble it. When I use: objdump -d example.o I get an assembly in code in the file format of elf64-x86-64. I am trying to disassemble this into ARM, how do I go about doing this?
Steve
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What does an equals sign = on the right side of a LDR instruction in ARM mean?

Been googling this for a while but i can't find any documentation relating to this. I've been trying to learn ARM and have been looking at the compiled ARM assembly code for a simple calculator.c program i wrote in order to see if I could…
Terry Martin
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The prefetch instruction

It appears the general logic for prefetch usage is that prefetch can be added, provided the code is busy in processing until the prefetch instruction completes its operation. But, it seems that if too much of prefetch instructions are used, then it…
Karthik Balaguru
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What do I need for development for an ARM processor?

I'm familiar with X86[-64] architecture & assembly. I want to start develop for an ARM processor. But unlike desktop processors, I don't have an actual ARM processor. I think I need an ARM simulator. http://www.armtutorial.com/ say An ARM assembly…
claws
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Link error: "Cannot find -ltinfo" on Ubuntu 12.04 on a 32-bit arm processor

I get the following link error when I'm compiling a small function using ncurses for an Ubuntu 12.04 running on arm. The error is arm-linux-gnueabihf/bin/ld: cannot find -ltinfo A lot of hints are floating around on what to install, but I can't…
Henrik
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How can I know if an ARM library is using hardfp?

I don't have access to the build command, I just have the library in my system. I guess I could build an hardfp executable that links against it and test, but I'm wondering if there's an easier way.
Sergio Martins
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Atomic operations in ARM

I've been working on an embedded OS for ARM, However there are a few things i didn't understand about the architecture even after referring to ARMARM and linux source. Atomic operations. ARM ARM says that Load and Store instructions are atomic and…
sgupta
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How does one do integer (signed or unsigned) division on ARM?

I'm working on Cortex-A8 and Cortex-A9 in particular. I know that some architectures don't come with integer division, but what is the best way to do it other than convert to float, divide, convert to integer? Or is that indeed the best…
Phonon
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