Makefile: $(CC) isn't working with ifeq

Question

So, this is odd. In my makefile I have

CC:=icc
ifeq ($(CC),icc)
CFLAGS := $(ICCFLAGS)
LIBS := $(LIBS) -openmp
else
CFLAGS := $(GCCFLAGS)
LIBS := $(LIBS) -fopenmp
endif

for make, the condition is false but

CCC:=icc
ifeq ($(CCC),icc)
CFLAGS := $(ICCFLAGS)
LIBS := $(LIBS) -openmp
else
CFLAGS := $(GCCFLAGS)
LIBS := $(LIBS) -fopenmp
endif

here the condition is true, and

CC:=icc
CCC:=$(CC)
ifeq ($(CCC),icc)
CFLAGS := $(ICCFLAGS)
LIBS := $(LIBS) -openmp
else
CFLAGS := $(GCCFLAGS)
LIBS := $(LIBS) -fopenmp
endif

here the condition is false again. What the hell is going on?

Try putting `$(info CC is $(CC))` at different places in the makefile (e.g. at the very top, just before `CC := icc`, just *after* `CC := icc`). That will give us a better idea of where the problem is. — Beta, Mar 30 '12 at 14:31

score 1 · Accepted Answer · answered Mar 30 '12 at 10:42

1

It seem that you're either passing CC as a command line option, like:

make CC=...

... or invoking make with -e switch, which forces environment variables to take precedence over the ones defined in Makefile.

You can use origin function to check how the variable has been defined:

CC := icc
$(error CC comes from $(origin CC))

If this prints command line or environment override, then the solution is to use override directive:

override CC := icc

This will set CC variable even if there is another one from command line or environment.

answered Mar 30 '12 at 10:42

Eldar Abusalimov

It says *** CC comes from file. Stop. – Patrik Mar 30 '12 at 13:29
well, using override solved the issue but I don't understand where CC is changed – Patrik Apr 04 '12 at 08:56

1 Answers1