Modifying a makefile to compile .cc and .cpp files

Question

I am trying to modify my makefile to support .cpp and .cc, however, I keep getting an error such as

target `source/systemFuncs.cpp' doesn't match the target pattern

I am modifying an existing makefile that support .cc and I want to make it also compile .cpp, but I am unsure how. This was originally a make file for a nacl project.

How can I compile both .cpp and .cc?

Related content to the makefile:

x86_32_OBJS:=$(patsubst %.cc,%_32.o,$(CXX_SOURCES))
$(x86_32_OBJS) : %_32.o : %.cc $(THIS_MAKE)
    $(CXX) ${INCDIRS} -o $@ -c $< -m32 -O0 -g $(CXXFLAGS)

$(PROJECT)_x86_32.nexe : $(x86_32_OBJS)
    $(CXX) -o $@ $^ -m32 -O0 -g $(CXXFLAGS) $(LDFLAGS)

CXX_SOURCES has both .cc files AND .cpp files in them, so it needs to be able to compile both

Beta · Accepted Answer · 2012-03-20T14:12:17.313

2

You haven't given us much to go on, but I'll make a guess. I think you added source/systemFuncs.cpp to CXX_SOURCES. Then Make hit this line:

x86_32_OBJS:=$(patsubst %.cc,%_32.o,$(CXX_SOURCES))

which replaced ".cc" with "_32.o", and left source/systemFuncs.cpp untouched. Make then tried to feed this name into a rule that expected "_32.o", and crashed.

Try this:

CPP_SOURCES += source/systemFuncs.cpp

x86_32_CPP_OBJS:=$(patsubst %.cpp,%_32.o,$(CPP_SOURCES))

$(x86_32_CPP_OBJS) : %_32.o : %.cpp $(THIS_MAKE)
    $(CXX) ${INCDIRS} -o $@ -c $< -m32 -O0 -g $(CXXFLAGS)

With luck, this will prove crude but effective. Further improvements will be possible later.

EDIT:
If both sets of filenames must be in one variable (CXX_SOURCES) you can separate them like this:

CC_SOURCES :=  $(filter %.cc, $(CXX_SOURCES))
CPP_SOURCES := $(filter %.cpp, $(CXX_SOURCES))

Does that suffice?

edited Mar 20 '12 at 14:12

answered Mar 20 '12 at 05:01

Beta

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I am sorry, that CXX_SOURCES was not clear. I have updated my question. I need to be able to compile both .cc AND .cpp. Your answer only supports .cpp and ignores .cc files. – chadb Mar 20 '12 at 05:08
@ Jonathan Leffler: Unfortunately I can not do that, the project (legacy project that traditionally uses VS) has both .cc and .cpp. Changing the file types is not an option. – chadb Mar 20 '12 at 05:34
Why not? It is easy to rename files. Even files with a history in a VCS can be renamed (unless the VCS is 100% completely useless). And even then, you can make a copy of the current `.cc` file and call it the `.cpp` file and work solely with the `.cpp` file going forward, or you can reverse the roles of the extensions. It _is_ possible; you may not be able to make that decision. But, it might be simplest to arrange that you 'compile' `.cc` files into `.cpp` files by `cp file.cc file.cpp` and then have your makefile just deal with `.cpp` files. Uniformity (consistency) is very sensible. – Jonathan Leffler Mar 20 '12 at 09:44
@chadb: I did not *ignore* `.cc` files, I showed you how to deal with the `cpp` files. I will try to spell it out more. – Beta Mar 20 '12 at 14:07

score 0 · Answer 2 · answered Mar 20 '12 at 08:48

You can create seperate but (for the execution) identical rules:

(I skipped THIS_MAKE, since it is empty in the code above, but you can add it)

# catch both
x86_32_OBJS:=$(addsuffix _32.o,$(basename $(CXX_SOURCES)))

# rule for .cc
$(patsubst %.cc,%_32.o,$(filter %.cc,$(CXX_SOURCES))):%_32.o: %.cc
     $(CXX) ${INCDIRS} -o $@ -c $< -m32 -O0 -g $(CXXFLAGS)

# rule for .cpp
$(patsubst %.cpp,%_32.o,$(filter %.cpp,$(CXX_SOURCES))):%_32.o: %.cpp
    $(CXX) ${INCDIRS} -o $@ -c $< -m32 -O0 -g $(CXXFLAGS)

$(PROJECT)_x86_32.nexe : $(x86_32_OBJS)
    $(CXX) -o $@ $^ -m32 -O0 -g $(CXXFLAGS) $(LDFLAGS)

Modifying a makefile to compile .cc and .cpp files

2 Answers2