Data Types additions larger than word

Question

How are large data types(Double/Float) loaded in to registers for Arithmetic operations ? Can registers hold more than a word size data ? If only 2 registers can be added to load the result to third register, then what happens with data types larger than single register ?

Answer 1

For example, in the SPARCv8 ABI, 64-bit doubles are loaded into two 32-bit registers, and FP operations work on two registers are the same time. fsqrtd %f10, %f8 takes the value in %f10:%f11 and writes the rooted result to %f8:%f9. On x86_32, you can observe something similar when doing 32x32->64 multiplications where the result will be in edx:eax (or so). Same actually with 16x16->32 multiplications in 286 mode where the result goes to dx:ax.

Answer 2

First, CPUs typically have separate register files for integer and floating point numbers.

In the 80's a few CPUs tried using a unified register space but found that to be a bandwidth bottleneck. Because floating point operations are almost always multi-cycle, and there's always a fair amount of integer-based flow control intermixed, it is more efficient to have separate register spaces being accessed simultaneously.

Secondly, for some architectures, floating point register files are all 80-bit extended floats ("long double" in C). Doubles and floats are extended to that format when loaded, and the extended format is rounded and truncated when being stored.

For integer operation, this depends on the architecture. Since 64-bit was an after-thought for x86, it overlays 8-bit (AL and AH), 16-bit (AX), 32-bit (EAX), and 64-bit (RAX) all on the same physical register, each accessed by different addressing modes. On the other hand, some RISC architectures treat numbers in registers as 64-bit for MOST operations, only caring about word size on loads and stores.