I'm really not sure if this is the right place to ask. I'm interested in the different programming models of different types of hardware.
It starts off like this, I was presenting some work I was doing w/ NVIDIA CUDA. I was telling people that one of the main issues with using a GPU as a coprocessor is the fact that you have to transfer data to and from the host to the GPU. Several people then proceeded to question me about the AMD "APUs", and the fact that the graphics cores are on the same die as the regular CPU cores.
I dodged the questions by pointing out that the Intel/AMD CPU+GPU chips will never contain as many graphics cores as the dedicated NVIDIA cards.
The thing is, I don't really know what the programming models are for the AMD APUs or the Intel Sandy/Ivy Bridge chips.
My questions are:
- How are programs written to take advantage of graphics cores on the AMD/Intel chips?
- Can these graphics cores really access host memory directly?
- Is there any information about the kind of performance of these chips, in SP and DP FLOPS?
- Coming from CUDA, what similarities can be found between programming for NVIDIA GPUs and the other chips in question?
- How did the Cell processor's SPEs access the memory, or how did its programming model compare to these Intel/AMD chips today?