How do the bank switching in PIC assembler?

Question

I'm getting confused by bank switching in PIC assembler... This works for putting a 'Q' on the usart:

bsf PORTB,1         ;Set Transmit DIR (PORTB (0x6) not mirrored in other banks)
movlw 'Q'           ;'Q' to work reg
movwf TXREG         ;work reg to TXREG (TXREG (0x19) not mirrored in other banks)
clrwdt              ;Clear watchdog
btfss TXSTA,TRMT    ;Wait until 'Q' is shifted (TXSTA is 0x18, not mirrored)
goto $-2
bcf PORTB,1         ;Set Recive DIR

And this works just as good:

BCF 0x3, 0x5        ;Switch to bank 0
BCF 0x3, 0x6
bsf PORTB,1         ;Set Transmit DIR
movlw 'Q'           ;'Q' to work reg
movwf TXREG         ;work reg to TXREG 
BSF 0x3, 0x5        ;Switch to bank 1
clrwdt              ;Clear watchdog
btfss TXSTA,TRMT    ;Wait until 'Q' is shifted
goto $-2
BCF 0x3, 0x5        ;Switch to bank 0
bcf PORTB,1         ;Set Recive DIR

I have checked that the compiler does not do any bank switching when I'm not watching... When do HAVE to switch bank?

Answer 1

It's best to just use BANKSEL to do your bank switching automatically. It is a special assembler directive the tells the assembler to switch to the correct bank. So, if you wish to access PORTB, just BANKSEL(PORTB) before using it.

PS: PORTB is in BANK0 on the PIC16 family, not BANK1 as in your code.

Answer 2

I too found bank selection very difficult to understand.

I am starting a project using PIC12F1822s, for their I2C functionality. Researching the background is rather like untangling a skein of threads, each one needs a lot of struggling before it comes clear. One of the threads I have managed to pull out is an explanation of the "BANKSEL" directive.

Background. There are several dozen SFRs -- Special Function Registers -- that assist in the operation of the device, mapped into the lower data memory. Because there are so many they are organised into 32 Banks, numbered 0 to 31, of 32 SFRs each. The SFRs are numbered sequentially in the form (bits) bbbbbfffffff where bbbbb is the bank number and fffffff is the offset in the bank. Their values are defined in the .INC file for the PIC, and there are many gaps in the sequence. Note that for the SFR offsets in banks 0 to 30 just five bits are sufficient, but for bank 31 seven bits are necessary.

When accessing one of these SFRs its Bank number must be in the BSR register, which is set by the "MOVLB " assembler instruction. To make this easy there is a Directive "BANKSEL " that can be used before each access of an SFR. (In other PICs, bits in the STATUS register hold the bank number) After successful testing, any superfluous BANKSELs can be removed. My puzzle (after establishing this so far -- the information in the documentation is sparse and scattered) was how this directive works. It is, of course, evaluated by the assembler before any code is produced, and this is my test code to check it out, using EQU to do the calculations, and explain it (note locn is "Location" i.e the address of the instruction.):

        ;BANKSEL is a directive that does the equivalent of 
        ;       movlb  (<SFRname> & 0XF0) >> 7

        ;For example TRISA is defined in P12F1822.INC as:

        ;-----Bank1------------------
        TRISA            EQU  H'008C' 

   Assembler:
   Locn   Resulting value     Line  Original code line content ";" is a comment
   ~~~~   ~~~~~~~~~~~~~~~     ~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
                              00047 ; Test of equivalent of BANKSEL directive          
          0000008C            00048 selbank equ TRISA
          00000080            00049 selbnk1 equ selbank & 0XF80 ; Extract bank no. ..
          00000001            00050 selbnk2 equ selbnk1 >> 7 ; .. move it to the right
          0000000C            00051 selbnk3 equ TRISA & 0XF80 >> 7 
        [ Operator precedence: >> (bit shift right) higher than & (bitwise AND) ]
          0000000C            00052 selbnk4 equ TRISA & (0XF80 >> 7) ; default
          00000001            00053 selbnk5 equ (TRISA & 0XF80) >> 7 ; as needed`
                     . . .
   006C   0021                00100 movlb  1           ; Should be same as next line
   006D   0021                00101 banksel TRISA       

Answer 3

First off which pic device are you using because that does make a slight difference. Also which compiler are you using.

However the reason your code works is because everything you need to do to tx to the uart is in bank 0. Your writes to port b are doing nothing I am guessing that you want to switch the trisb and that is in bank 1 but since the uart has control of the pins writing to port B it self has no effect. In your second example you are polling what you think is TXSTA but that is in bank 0 not bank 1. I am guessing that you get lucky by polling wrong location and the bit is always in the correct state so the loop terminates.

When I do a transmit I prefer to first see if the uart is empty and wait until it is and then send the char. No need to wait for it to finish transmitting unless you want to use an interupt for example to get the next char.

So both pieces of code work because you are in bank 0 in both when you do movwf TXREG. The rest is handled in hardware for you.

Edit: Now that I know the part you are correct in that TXSTA is in bank 1. You through me because you had a comment of the address as 0x18 and it should be 0x98. In the first example you are polling RCSTA bit 1 which is the OERR not TXSTA. So if it is working this implies that OERR=1 which is very possible I usually clear it when I do anything with the receive.