What determines the size of the Program Counter?
So, this is what I know:
Memory Address Register (MAR) size is the log2(memory space).
Is the PC size the same as the addressability of each memory address or the same as the MAR?
For example, if memory space is given to be 16M and each memory space is 16-bit addressable, then MAR size will be 24 bits addressable to specify a memory address location.
Is the PC size 24 bits—the same as the MAR—or 32 bits—the addressability of each space?
I don't know what MAR is, but typically your program counter (AKA instruction pointer) register is big enough to address all the program memory. Typically.
The original i80x86 CPUs have the instruction pointer effectively split into 2 pieces, a segment selector and offset. The actual address that goes onto the address bus when accessing the physical memory is formed using these 2 pieces. In the so-called real addressing mode, the address is simply segment selector * 16 + offset. These 2 pieces are 16-bit and this addressing scheme lets you access about 1MB of memory. If you only changed the instruction pointer and never the segment, you'd be constrained to 64KB. There are other processors with split instruction pointers. Texas Instruments' TMS320C54xx, for example.
Going back to the x86... On 64-bit x86 CPUs your instruction pointer is 64-bit long. However, the CPU may not (and I think still doesn't) support full 64-bit memory addresses, using only the low 52 or so bits. This is an example where the instruction pointer is larger than necessary to access all of the memory.
