I am trying to use STM32H743VGT6 with RTC peripheral support. If I setup LSE without setting LSE drive capability to HIGH before INIT PLL, the LSE could fail to start at about 10% failure rate.
But if set LSE drive capability to HIGH before PLL initialization, then everything goes fine. The question is is that necessary to set LSE drive capability to high before RTC PLL begins to work?
LSE is an extremely low power oscillator, and as such its operation depends on many factors, such as power supply voltage, type of the crystal, values of burden capacitors, PCB layout, signals in the crystal oscillator vicinity, temperature.
At higher drive setting the oscillator has higher chance to start and remain oscillating at various external influences. This is its purpose, the increased amplifier gain compensates for the losses in external circuitry and results in higher oscillation amplitude which allows to reject interferences from other neighbouring signals. This all is at the cost of increased power consumption, that's why this option is settable, so that the user can make a tradeoff according to the particular application's needs.
Read AN2867.
JW
