I know that AHB has a pipelined driver because it has two pipelined stages, address and data phase but I came across a question to write pipelined AXI3 driver in UVM somewhere, does it mean outstanding transactions ? and pipelined stages = no. of outstanding transactions allowed ? Please let me know if my understanding is correct ?
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Please clarify the question by providing context for what and where you came across something. "I came across a question to write pipelined AXI3 driver in UVM somewhere" In other words include the something and tell where it came from to provide context. – – Mikef Aug 24 '23 at 14:33