Here here different UVM class signatures:
virtual class uvm_env extends uvm_component;
virtual class uvm_scoreboard extends uvm_component;
virtual class uvm_monitor extends uvm_component;
class uvm_sequencer #(type REQ=uvm_sequence_item, RSP=REQ)
extends uvm_sequencer_param_base #(REQ, RSP);
class uvm_driver #(type REQ=uvm_sequence_item,
type RSP=REQ) extends uvm_component;
virtual class uvm_sequence #(type REQ = uvm_sequence_item,
type RSP = REQ) extends uvm_sequence_base;
In above we can see uvm_sequencer
, uvm_driver
and uvm_sequence
are parametrized classes. Why uvm_sequence
class is still abstract one, while other two are not?