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Recently, I am trying to copy a UVM architecture that is used to verify a router of NoC (network on chip). Since I want to verify my router of NoC, the architecture doesn't change much. However, it doesn't work. The following information comes from the transcript file after I run the run.do file.

# do run.do
# random
# UVM_LOW
# true
# true
# true
# parallel_test
# /home/ICer/ring_router/vips
# /home/ICer/ring_router/design
# QuestaSim-64 vlog 10.7c Compiler 2018.08 Aug 17 2018
# Start time: 15:58:00 on Jul 26,2023
# vlog -sv "+incdir+/home/ICer/ring_router/vips/router_pkg" -F /home/ICer/ring_router/vips/router_pkg/hvl.f 
# -- Compiling package router_pkg
# -- Importing package mtiUvm.uvm_pkg (uvm-1.1d Built-in)
# ** Note: (vlog-2286) /home/ICer/ring_router/vips/router_pkg/router_pkg.sv(4): Using implicit +incdir+/home/mentor/questasim/uvm-1.1d/../verilog_src/uvm-1.1d/src from import uvm_pkg
# ** Error: ** while parsing file included at /home/ICer/ring_router/vips/router_pkg/router_pkg.sv(8)
# ** at /home/ICer/ring_router/vips/router_pkg/src/router_base_driver.sv(26): (vlog-2730) Undefined variable: 'router_if'.
# ** Error: ** while parsing file included at /home/ICer/ring_router/vips/router_pkg/router_pkg.sv(12)
# ** at /home/ICer/ring_router/vips/router_pkg/src/router_agent.sv(7): Invalid type 'router_agent_config'. Please check the type of the variable 'cfg'.
# ** Error: ** while parsing file included at /home/ICer/ring_router/vips/router_pkg/router_pkg.sv(12)
# ** at /home/ICer/ring_router/vips/router_pkg/src/router_agent.sv(21): (vlog-2730) Undefined variable: 'router_agent_config'.
# ** Error: ** while parsing file included at /home/ICer/ring_router/vips/router_pkg/router_pkg.sv(12)
# ** at /home/ICer/ring_router/vips/router_pkg/src/router_agent.sv(25): (vlog-2730) Undefined variable: 'router_if'.
# End time: 15:58:00 on Jul 26,2023, Elapsed time: 0:00:00
# Errors: 4, Warnings: 0
# ** Error: /home/mentor/questasim/linux_x86_64/vlog failed.
# Error in macro ./run.do line 22
# /home/mentor/questasim/linux_x86_64/vlog failed.
#     while executing
# "vlog -sv +incdir+$env(VIP_LIBRARY_HOME)/router_pkg -F $env(VIP_LIBRARY_HOME)/router_pkg/hvl.f"

The following file is router_pkg.sv:

package router_pkg;
    import uvm_pkg::*;
    
    `include "uvm_macros.svh"

    `include "src/router_typedefs.sv"
    `include "src/router_packet_t.sv"
    `include "src/router_base_driver.sv"
    `include "src/router_master_driver.sv"
    `include "src/router_slave_driver.sv"
    `include "src/router_monitor.sv"
    `include "src/router_agent.sv"
    `include "src/router_agent_config.sv"
    `include "src/router_base_seq.sv"
    //`include "src/router_if.sv"
endpackage

The following file is router_base_driver.sv:

//`include "router_if.sv"

class router_base_driver extends uvm_driver #(router_packet_t);
`uvm_component_utils( router_base_driver );

//uvm_analysis_port #( router_packet_t ) aport;

virtual router_if dut_vi;
bit [1:0] port;

function new(string name, uvm_component parent);
    super.new(name, parent);
endfunction:new

function void build_phase(uvm_phase phase);
//    aport = new("aport", this);
    
    print_config();

    if(!uvm_config_db #(bit [1:0] ) :: get (this,"","port",port)) begin
        `uvm_fatal("driver","no port");
    end

    `uvm_info("driver", $sformatf("PORT number : %0d", port),UVM_LOW);

    if(!uvm_config_db # (router_if) :: get (this,"", "if", dut_vi)) begin
        `uvm_fatal("driver","no if");
    end

endfunction: build_phase

endclass : router_base_driver

The following file is router_agent.sv:

class router_agent extends uvm_agent;
`uvm_component_utils(router_agent);

packet_sequencer sequencer_h;
router_base_driver driver_h;
router_monitor monitor_h;
router_agent_config cfg;
string mode;

function new(string name, uvm_component parent);
    super.new(name,parent);
endfunction:new

function void build_phase(uvm_phase phase);
    virtual router_if dut_if;
    bit [1:0] port;

    if(uvm_top.get_report_verbosity_level >= UVM_HIGH)
        print_config();

    if(!uvm_config_db #(router_agent_config)::get(this,"","config",cfg)) begin
        `uvm_fatal("agent","no config");
    end

    if(!uvm_config_db #(router_if)::get(this,"","if",dut_if)) begin
        `uvm_fatal("agent","no if");
    end

    uvm_config_db #(router_if)::set(this,"monitor","if",dut_if);
    uvm_config_db #(router_if)::set(this,"driver","if",dut_if);

    if(!uvm_config_db #(string)::get(this,"","mode",mode)) begin
        `uvm_fatal("agent","no mode");
    end
    if(mode != "slave" && mode != "master" ) begin
        `uvm_fatal("agent","mode is not valid");
    end

    //port id
    if(!uvm_config_db #(bit [1:0])::get (this,"","port",port))
        `uvm_fatal("agent","no port");
    `uvm_info("agent", $sformatf("port number: %0d", port), UVM_LOW)
    uvm_config_db #(bit [1:0])::set(this,"monitor","port",port);
    uvm_config_db #(bit [1:0])::set(this,"driver","port",port);

    if(cfg.is_active) begin
        if(mode == "master") begin
            sequencer_h = packet_sequencer::type_id::create("sequencer",this);
            set_inst_override_by_type({get_full_name(),".driver"},router_base_driver::get_type(), router_master_driver::get_type());
            driver_h = router_master_driver::type_id::create("driver", this);
            uvm_config_db #(bit [3:0])::set(this,"driver","cycle",cfg.cycle);
            uvm_config_db #(bit)::set(this,"driver","enabled",cfg.master_driver_enabled);
        end
        else if(mode == "slave") begin
            set_inst_override_by_type({get_full_name(),".driver"},router_base_driver::get_type(), router_slave_driver::get_type());
            driver_h = router_slave_driver::type_id::create("driver", this);
            uvm_config_db #(bit [3:0])::set(this,"driver","ready_probability",cfg.probability);
        end
    end

    monitor_h = router_monitor::type_id::create("monitor", this);
    `uvm_info("msg","agent build done",UVM_LOW)
endfunction:build_phase

function void connect_phase(uvm_phase phase);
    if(mode == "master" && cfg.is_active)
        driver_h.seq_item_port.connect(sequencer_h.seq_item_export);
    `uvm_info("msg","connect agent done",UVM_LOW);
endfunction:connect_phase

endclass:router_agent

I have no idea how to handle this as the original project works fine.

I have modified the router_base_driver.sv file as follows (just added an include) :

`include "router_if.sv"

class router_base_driver extends uvm_driver #(router_packet_t);
`uvm_component_utils( router_base_driver );

//uvm_analysis_port #( router_packet_t ) aport;

virtual router_if dut_vi;
bit [1:0] port;

function new(string name, uvm_component parent);
    super.new(name, parent);
endfunction:new

function void build_phase(uvm_phase phase);
//    aport = new("aport", this);
    
    print_config();

    if(!uvm_config_db #(bit [1:0] ) :: get (this,"","port",port)) begin
        `uvm_fatal("driver","no port");
    end

    `uvm_info("driver", $sformatf("PORT number : %0d", port),UVM_LOW);

    if(!uvm_config_db # (router_if) :: get (this,"", "if", dut_vi)) begin
        `uvm_fatal("driver","no if");
    end

endfunction: build_phase

endclass : router_base_driver

The error is reduced to 1 but still very strange.

# do run.do
# random
# UVM_LOW
# true
# true
# true
# parallel_test
# /home/ICer/ring_router/vips
# /home/ICer/ring_router/design
# QuestaSim-64 vlog 10.7c Compiler 2018.08 Aug 17 2018
# Start time: 16:53:18 on Jul 26,2023
# vlog -sv "+incdir+/home/ICer/ring_router/vips/router_pkg" -F /home/ICer/ring_router/vips/router_pkg/hvl.f 
# -- Compiling package router_pkg
# -- Importing package mtiUvm.uvm_pkg (uvm-1.1d Built-in)
# ** Note: (vlog-2286) /home/ICer/ring_router/vips/router_pkg/router_pkg.sv(4): Using implicit +incdir+/home/mentor/questasim/uvm-1.1d/../verilog_src/uvm-1.1d/src from import uvm_pkg
# ** Error: (vlog-13069) ** while parsing file included at /home/ICer/ring_router/vips/router_pkg/router_pkg.sv(8)
# ** while parsing file included at /home/ICer/ring_router/vips/router_pkg/src/router_base_driver.sv(1)
# ** at /home/ICer/ring_router/vips/router_pkg/src/router_if.sv(3): near "router_if": syntax error, unexpected IDENTIFIER, expecting class.
# End time: 16:53:19 on Jul 26,2023, Elapsed time: 0:00:01
# Errors: 1, Warnings: 0
# ** Error: /home/mentor/questasim/linux_x86_64/vlog failed.
# Error in macro ./run.do line 22
# /home/mentor/questasim/linux_x86_64/vlog failed.
#     while executing
# "vlog -sv +incdir+$env(VIP_LIBRARY_HOME)/router_pkg -F $env(VIP_LIBRARY_HOME)/router_pkg/hvl.f"

The following file is router_if.sv

//`include "uvm_macros.svh"
//import router_pkg::*;
interface router_if(input bit clk, input bit rst, input bit polarity);
    import router_pkg::*;

logic ready; 
logic send;
logic [63:0] data;
// need to mention, datain means data in dut. So for test side, datain port is output port, it output to dut's input.
modport datain(
    input ready,
    output send,
    output data
);
//dataout means data out from dut. So for test side, dataout port is input port, it accept the dut's output data and signal.
modport dataout(
    input data,send,
    output ready
);

endinterface

Please help.

toolic
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benjstark
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1 Answers1

0

From your first code example, there is no indication that you compiled the router_if.sv file. I see it commented out in a couple of places. Since you did not show all of your code, and you did not show the complete compile command (particularly the contents of the hvl.f file), I assume you did not compile it. That would explain the 1st set of error messages you see.

Here are some things to try.

Remove this line from the router_if.sv file:

import router_pkg::*;

Since you are not using anything from the package in the interface, there should be no need to import the package.

Then, include router_if.sv at the top of the router_pkg.sv file such that it is outside the package body:

`include "src/router_if.sv"

package router_pkg;
    import uvm_pkg::*;
    
    `include "uvm_macros.svh"

    `include "src/router_typedefs.sv"
    `include "src/router_packet_t.sv"
    `include "src/router_base_driver.sv"
    `include "src/router_master_driver.sv"
    `include "src/router_slave_driver.sv"
    `include "src/router_monitor.sv"
    `include "src/router_agent.sv"
    `include "src/router_agent_config.sv"
    `include "src/router_base_seq.sv"
endpackage

Think of an interface as being more similar in nature to a module than a class. It is typical to include classes inside a package, but not interfaces.

toolic
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