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I am reviewing the NVM Express Base Specification, Rev. 1.4 Paragraph 7.2 Command Submission and Completion Mechanism (Informative) and wondering where to start (examples) with a C code solution to establishing the Submission and Completion Queues on the PCIe Base Registers and then generating submission data and monitoring the completion queue.

I have never written a C NVMe or PCIe device driver nor worked with an FPGA. Expecting pointers as to where to start the process in a bare metal environment.

mpatch54
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  • Please clarify your specific problem or provide additional details to highlight exactly what you need. As it's currently written, it's hard to tell exactly what you're asking. – Community Jul 11 '23 at 11:22
  • Quick clarification question here: Are you generally familiar with NVME and looking for low-level specifics? Or are you starting from scratch in understanding how to work with it? Asking as that changes the places I would recommend starting (as well as the areas I have knowledge in ;)) – I.F. Adams Jul 11 '23 at 16:20
  • I.F. Adams, I am reviewing the NVME Base Specification for the PCIe memory model and I am starting from scratch in understanding how to work with it. – mpatch54 Jul 14 '23 at 15:28
  • To clarify, neither the standard nvme toolset nor Linux APis would not be available for development. – mpatch54 Jul 14 '23 at 15:33
  • @mpatch54 Understood, even if you cannot use their modules for development, I would suggest looking a them and playing around with the command set from a higher layer to get a basic understanding of the protocol ins and outs in practice before diving into attempting to develop at a lower layer. Good luck! – I.F. Adams Jul 31 '23 at 15:51

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