sdcc compiler wrong machine code generation

Question

the sdcc compiler generate a unexpected instruction output after compilation, I rechecked this code in ChatGPT, at the source level all is fine to my knowledge.

this is the code:

#include <stdio.h>
#include <at89x52.h>

// Variable and declaration
#define OSC 20000000    // 20MHz
#define BAUDRATE 9600   // 9600
#define th2tl2 ((((unsigned long int)BAUDRATE * 32) / OSC)-65536)
#define th2 (unsigned char)th2tl2>>8
#define tl2 (unsigned char)th2tl2
// Functions
void uart_setup();  // UART register setup
void setup();       // One-time runnable code

// Main
void main() {
    setup();
}

void setup() {
    uart_setup();   // Setup UART
}

void uart_setup() {
    unsigned long int word = (((unsigned long int)BAUDRATE * 32) / OSC) ;
    word=word-65536;
    ACC=th2;
    C_T2 = 0;    // Select Timer2
    SM0 = 1;    // MODE3
    SM1 = 1;
    TI = 0;    // Clear TI flag
    RI = 0;    // Clear RI flag
    TCLK = 1;    // Enable transmitter clock for transmit
    RCLK = 0;    // Disable the receiver clock
    RCAP2H = (unsigned char)(word >> 8);    // Assign higher 8 bits of word to RCAP2H
    RCAP2L = (unsigned char)word;    // Assign lower 8 bits of word to RCAP2L
    TH2 = RCAP2H;
    TL2 = RCAP2L;    
    TR2 = 1;    // Start Timer2
    REN = 1;    // Enable reception
}

after compiled this .here is the compiler output .note the value of TH2, TL2, RCAPH, and RCAPL registers. These registers are not set to values I mentioned in the code!

;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 4.0.0 #11528 (Linux)
;--------------------------------------------------------
    .module uart_tx
    .optsdcc -mmcs51 --model-small
    
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
    .globl _main
    .globl _CY
    .globl _AC
    .globl _F0
    .globl _RS1
    .globl _RS0
    .globl _OV
    .globl _FL
    .globl _P
    .globl _TF2
    .globl _EXF2
    .globl _RCLK
    .globl _TCLK
    .globl _EXEN2
    .globl _TR2
    .globl _C_T2
    .globl _CP_RL2
    .globl _T2CON_7
    .globl _T2CON_6
    .globl _T2CON_5
    .globl _T2CON_4
    .globl _T2CON_3
    .globl _T2CON_2
    .globl _T2CON_1
    .globl _T2CON_0
    .globl _PT2
    .globl _PS
    .globl _PT1
    .globl _PX1
    .globl _PT0
    .globl _PX0
    .globl _RD
    .globl _WR
    .globl _T1
    .globl _T0
    .globl _INT1
    .globl _INT0
    .globl _TXD
    .globl _RXD
    .globl _P3_7
    .globl _P3_6
    .globl _P3_5
    .globl _P3_4
    .globl _P3_3
    .globl _P3_2
    .globl _P3_1
    .globl _P3_0
    .globl _EA
    .globl _ET2
    .globl _ES
    .globl _ET1
    .globl _EX1
    .globl _ET0
    .globl _EX0
    .globl _P2_7
    .globl _P2_6
    .globl _P2_5
    .globl _P2_4
    .globl _P2_3
    .globl _P2_2
    .globl _P2_1
    .globl _P2_0
    .globl _SM0
    .globl _SM1
    .globl _SM2
    .globl _REN
    .globl _TB8
    .globl _RB8
    .globl _TI
    .globl _RI
    .globl _T2EX
    .globl _T2
    .globl _P1_7
    .globl _P1_6
    .globl _P1_5
    .globl _P1_4
    .globl _P1_3
    .globl _P1_2
    .globl _P1_1
    .globl _P1_0
    .globl _TF1
    .globl _TR1
    .globl _TF0
    .globl _TR0
    .globl _IE1
    .globl _IT1
    .globl _IE0
    .globl _IT0
    .globl _P0_7
    .globl _P0_6
    .globl _P0_5
    .globl _P0_4
    .globl _P0_3
    .globl _P0_2
    .globl _P0_1
    .globl _P0_0
    .globl _B
    .globl _A
    .globl _ACC
    .globl _PSW
    .globl _TH2
    .globl _TL2
    .globl _RCAP2H
    .globl _RCAP2L
    .globl _T2MOD
    .globl _T2CON
    .globl _IP
    .globl _P3
    .globl _IE
    .globl _P2
    .globl _SBUF
    .globl _SCON
    .globl _P1
    .globl _TH1
    .globl _TH0
    .globl _TL1
    .globl _TL0
    .globl _TMOD
    .globl _TCON
    .globl _PCON
    .globl _DPH
    .globl _DPL
    .globl _SP
    .globl _P0
    .globl _setup
    .globl _uart_setup
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
    .area RSEG    (ABS,DATA)
    .org 0x0000
_P0 =   0x0080
_SP =   0x0081
_DPL    =   0x0082
_DPH    =   0x0083
_PCON   =   0x0087
_TCON   =   0x0088
_TMOD   =   0x0089
_TL0    =   0x008a
_TL1    =   0x008b
_TH0    =   0x008c
_TH1    =   0x008d
_P1 =   0x0090
_SCON   =   0x0098
_SBUF   =   0x0099
_P2 =   0x00a0
_IE =   0x00a8
_P3 =   0x00b0
_IP =   0x00b8
_T2CON  =   0x00c8
_T2MOD  =   0x00c9
_RCAP2L =   0x00ca
_RCAP2H =   0x00cb
_TL2    =   0x00cc
_TH2    =   0x00cd
_PSW    =   0x00d0
_ACC    =   0x00e0
_A  =   0x00e0
_B  =   0x00f0
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
    .area RSEG    (ABS,DATA)
    .org 0x0000
_P0_0   =   0x0080
_P0_1   =   0x0081
_P0_2   =   0x0082
_P0_3   =   0x0083
_P0_4   =   0x0084
_P0_5   =   0x0085
_P0_6   =   0x0086
_P0_7   =   0x0087
_IT0    =   0x0088
_IE0    =   0x0089
_IT1    =   0x008a
_IE1    =   0x008b
_TR0    =   0x008c
_TF0    =   0x008d
_TR1    =   0x008e
_TF1    =   0x008f
_P1_0   =   0x0090
_P1_1   =   0x0091
_P1_2   =   0x0092
_P1_3   =   0x0093
_P1_4   =   0x0094
_P1_5   =   0x0095
_P1_6   =   0x0096
_P1_7   =   0x0097
_T2 =   0x0090
_T2EX   =   0x0091
_RI =   0x0098
_TI =   0x0099
_RB8    =   0x009a
_TB8    =   0x009b
_REN    =   0x009c
_SM2    =   0x009d
_SM1    =   0x009e
_SM0    =   0x009f
_P2_0   =   0x00a0
_P2_1   =   0x00a1
_P2_2   =   0x00a2
_P2_3   =   0x00a3
_P2_4   =   0x00a4
_P2_5   =   0x00a5
_P2_6   =   0x00a6
_P2_7   =   0x00a7
_EX0    =   0x00a8
_ET0    =   0x00a9
_EX1    =   0x00aa
_ET1    =   0x00ab
_ES =   0x00ac
_ET2    =   0x00ad
_EA =   0x00af
_P3_0   =   0x00b0
_P3_1   =   0x00b1
_P3_2   =   0x00b2
_P3_3   =   0x00b3
_P3_4   =   0x00b4
_P3_5   =   0x00b5
_P3_6   =   0x00b6
_P3_7   =   0x00b7
_RXD    =   0x00b0
_TXD    =   0x00b1
_INT0   =   0x00b2
_INT1   =   0x00b3
_T0 =   0x00b4
_T1 =   0x00b5
_WR =   0x00b6
_RD =   0x00b7
_PX0    =   0x00b8
_PT0    =   0x00b9
_PX1    =   0x00ba
_PT1    =   0x00bb
_PS =   0x00bc
_PT2    =   0x00bd
_T2CON_0    =   0x00c8
_T2CON_1    =   0x00c9
_T2CON_2    =   0x00ca
_T2CON_3    =   0x00cb
_T2CON_4    =   0x00cc
_T2CON_5    =   0x00cd
_T2CON_6    =   0x00ce
_T2CON_7    =   0x00cf
_CP_RL2 =   0x00c8
_C_T2   =   0x00c9
_TR2    =   0x00ca
_EXEN2  =   0x00cb
_TCLK   =   0x00cc
_RCLK   =   0x00cd
_EXF2   =   0x00ce
_TF2    =   0x00cf
_P  =   0x00d0
_FL =   0x00d1
_OV =   0x00d2
_RS0    =   0x00d3
_RS1    =   0x00d4
_F0 =   0x00d5
_AC =   0x00d6
_CY =   0x00d7
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
    .area REG_BANK_0    (REL,OVR,DATA)
    .ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
    .area DSEG    (DATA)
;--------------------------------------------------------
; overlayable items in internal ram 
;--------------------------------------------------------
    .area   OSEG    (OVR,DATA)
;--------------------------------------------------------
; Stack segment in internal ram 
;--------------------------------------------------------
    .area   SSEG
__start__stack:
    .ds 1

;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
    .area ISEG    (DATA)
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
    .area IABS    (ABS,DATA)
    .area IABS    (ABS,DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
    .area BSEG    (BIT)
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
    .area PSEG    (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
    .area XSEG    (XDATA)
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
    .area XABS    (ABS,XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
    .area XISEG   (XDATA)
    .area HOME    (CODE)
    .area GSINIT0 (CODE)
    .area GSINIT1 (CODE)
    .area GSINIT2 (CODE)
    .area GSINIT3 (CODE)
    .area GSINIT4 (CODE)
    .area GSINIT5 (CODE)
    .area GSINIT  (CODE)
    .area GSFINAL (CODE)
    .area CSEG    (CODE)
;--------------------------------------------------------
; interrupt vector 
;--------------------------------------------------------
    .area HOME    (CODE)
__interrupt_vect:
    ljmp    __sdcc_gsinit_startup
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
    .area HOME    (CODE)
    .area GSINIT  (CODE)
    .area GSFINAL (CODE)
    .area GSINIT  (CODE)
    .globl __sdcc_gsinit_startup
    .globl __sdcc_program_startup
    .globl __start__stack
    .globl __mcs51_genXINIT
    .globl __mcs51_genXRAMCLEAR
    .globl __mcs51_genRAMCLEAR
    .area GSFINAL (CODE)
    ljmp    __sdcc_program_startup
;--------------------------------------------------------
; Home
;--------------------------------------------------------
    .area HOME    (CODE)
    .area HOME    (CODE)
__sdcc_program_startup:
    ljmp    _main
;   return from main will return to caller
;--------------------------------------------------------
; code
;--------------------------------------------------------
    .area CSEG    (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'main'
;------------------------------------------------------------
;   uart_tx.c:15: void main() {
;   -----------------------------------------
;    function main
;   -----------------------------------------
_main:
    ar7 = 0x07
    ar6 = 0x06
    ar5 = 0x05
    ar4 = 0x04
    ar3 = 0x03
    ar2 = 0x02
    ar1 = 0x01
    ar0 = 0x00
;   uart_tx.c:16: setup();
;   uart_tx.c:17: }
    ljmp    _setup
;------------------------------------------------------------
;Allocation info for local variables in function 'setup'
;------------------------------------------------------------
;   uart_tx.c:19: void setup() {
;   -----------------------------------------
;    function setup
;   -----------------------------------------
_setup:
;   uart_tx.c:20: uart_setup(); // Setup UART
;   uart_tx.c:21: }
    ljmp    _uart_setup
;------------------------------------------------------------
;Allocation info for local variables in function 'uart_setup'
;------------------------------------------------------------
;word                      Allocated to registers 
;------------------------------------------------------------
;   uart_tx.c:23: void uart_setup() {
;   -----------------------------------------
;    function uart_setup
;   -----------------------------------------
_uart_setup:
;   uart_tx.c:26: ACC=th2;
    mov _ACC,#0x00
;   uart_tx.c:27: C_T2 = 0;    // Select Timer2
;   assignBit
    clr _C_T2
;   uart_tx.c:28: SM0 = 1;    // MODE3
;   assignBit
    setb    _SM0
;   uart_tx.c:29: SM1 = 1;
;   assignBit
    setb    _SM1
;   uart_tx.c:30: TI = 0;    // Clear TI flag
;   assignBit
    clr _TI
;   uart_tx.c:31: RI = 0;    // Clear RI flag
;   assignBit
    clr _RI
;   uart_tx.c:32: TCLK = 1;    // Enable transmitter clock for transmit
;   assignBit
    setb    _TCLK
;   uart_tx.c:33: RCLK = 0;    // Disable the receiver clock
;   assignBit
    clr _RCLK
;   uart_tx.c:34: RCAP2H = (unsigned char)(word >> 8);    // Assign higher 8 bits of word to RCAP2H
    mov _RCAP2H,#0x00
;   uart_tx.c:35: RCAP2L = (unsigned char)word;    // Assign lower 8 bits of word to RCAP2L
    mov _RCAP2L,#0x00
;   uart_tx.c:36: TH2 = RCAP2H;
    mov _TH2,_RCAP2H
;   uart_tx.c:37: TL2 = RCAP2L;    
    mov _TL2,_RCAP2L
;   uart_tx.c:38: TR2 = 1;    // Start Timer2
;   assignBit
    setb    _TR2
;   uart_tx.c:39: REN = 1;    // Enable reception
;   assignBit
    setb    _REN
;   uart_tx.c:40: }
    ret
    .area CSEG    (CODE)
    .area CONST   (CODE)
    .area XINIT   (CODE)
    .area CABS    (ABS,CODE)

i also emulate it in emu8051 but same mov tl2,#00 and mov th2,#00 help

Your question could do with a basic spell check. Grammar and punctuation could be improved as well. Other than that, try making a minimal, complete, verifiable example. There is so much code in your question that does not have anything to do with your problem, which is making it hard to see what's what. Have you checked in `at89x52.h`? Some `#define` could be at fault here. — Lorraine, Jun 25 '23 at 14:31
I do not trust ChatGPT. It is good in constructing sequences of words, which look reasonable, but it has no "intelligence" in understanding source code. — the busybee, Jun 26 '23 at 06:26

score 0 · Answer 1 · answered Jun 26 '23 at 06:24

The generated code is correct.

Your error is in the values you provide:

#define OSC 20000000    // 20MHz
#define BAUDRATE 9600   // 9600
#define th2tl2 ((((unsigned long int)BAUDRATE * 32) / OSC)-65536)
#define th2 (unsigned char)th2tl2>>8

This results in:

;   uart_tx.c:26: ACC=th2;
    mov _ACC,#0x00

How comes?

Let's do manually what the preprocessor does, replace the macro symbols by their respective replacement:

#define th2 (unsigned char)((((unsigned long int)9600 * 32) / 20000000)-65536)>>8

The compiler folds all constants, this means it calculates the results of the expressions:

(unsigned long int)9600 * 32 results in (unsigned long int)307200.
((unsigned long int)307200) / 20000000 results in (unsigned long int)0.
Wait! What? Yes, the quotient is smaller than 1, obviously, and as an integer calculation the result is zero.
((unsigned long int)0)-65536results in (unsigned long int)4294901760.
In hex this is 0xFFFF0000, as an unsigned value "wrapped around".
Since the cast has a higher operator precedence than the bitwise shift, (unsigned char)4294901760 comes first. This results in (unsigned char)0.
The bitwise right shift will promote its operands to int: 0>>8 results in 0.

Well, and this value is compiled into the output.

sdcc compiler wrong machine code generation

1 Answers1