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I'm wondering if RAM is typically byte or word level addressed, and I think the answers about it I can find are contradictory. I'm aware different RAM might have different designs, and just wonder in general what the trends are.

Paul on Quora says modern RAM is word-addressed:

"DDR RAM actually addresses 64-bit blocks, not individual bytes. The bytes are extracted by the CPU (or the L3 cache which may actually have a byte-addressable memory, although it still is used in word-addressable mode pretty much always since it’s used by the L2 cache which works with 128-bit cache lines). "

While SLaks on Stackoverflow says it is always byte-addressed:

"RAM is always byte-addressed. "

So I thought I'd ask, if I have an isolated RAM, typical modern RAM, and input an address on the address pins, and then increment it by 1, will the output differ with one byte or one word? Is the RAM byte-addressed or is it word-addressed and the CPU adds byte-addressing and therefore it is said that "memory is byte addressed" while it is actually word-addressed?

BipedalJoe
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  • SLaks comment refers to how *software* sees the RAM, not to how the data is retrieved on the hardware level. And even there the comment is arguably wrong, in the sense that while RAM is *nominally* counted in individual bytes, and pointers can *usually* be treated as addressing RAM byte for byte (even if far more is retrieved in one go), occasionally this will be limited by hardware with specific requirements for alignment, requiring that anything smaller than a register be handled by masking off bits instead. It's then up to a higher-level compiler to handle this translation transparently. – Jeroen Mostert Apr 23 '23 at 16:33
  • You have to go back several decades to find mainstream systems that actually had truly byte-addressable RAM on every level, where the CPU would ask for (and receive) individual bytes from RAM rather than larger blocks. This was only feasible when CPU instructions were not orders of magnitude faster than RAM accesses, as they are now. – Jeroen Mostert Apr 23 '23 at 16:37
  • Thanks. Sounds from both of you like RAM is then normally word-addressed. As in, if I have an isolated RAM chip, and apply voltages on it, and read out voltages from it, and ignore CPU and software and whatever else. This makes sense to me. It explains, for example, the issue of alignment and unaligned reads costing more (would not be a problem if RAM was byte-addressed. ) But for some reason, lots and lots of answers on the internet about the topic of alignment are claiming RAM is byte-addressed, thus confusing the people asking about it, who then actually seem to have assumed correctly. – BipedalJoe Apr 23 '23 at 17:24
  • Modern DRAM makes things even more complicated by having sophisticated ways for prefetching, burst transfers and accessing multiple banks, all in the name of increasing throughput. In that sense even the concept of addressing RAM by words is a little misleading, in that you can't avoid getting much, much more than a CPU word with every access. Nor is it necessarily the case that a RAM word corresponds to a CPU word (although this happens to be the case for 64-bit CPUs and current DRAM). And, of course, there are hierarchies of cache in between the compute cores and the distant hills of DIMMs. – Jeroen Mostert Apr 23 '23 at 17:49
  • Thanks. I have no problem about that type of complexity though because it makes sense. What I think is "complicated" is when things do not add up, such as that RAM is according to many read on the byte level, but unaligned reads are not possible. That does not add up. But I read so many conflicting answers on that topic, that conflict with what you wrote (I misread the comments first as being from two different users). But that it is not "byte addressed" fits the best for me. – BipedalJoe Apr 23 '23 at 19:26

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According to shreya garg 4 in Difference between Byte Addressable Memory and Word Addressable Memory

(...) in case of either of Byte Address or Word Address, the address size can be any number of bits (depends on the number of cells in the chip) but the cell size differs in each case.

and

The default memory configuration in the Computer design is Byte Addressable.

A memory chip is made of cells, and each cell has a size. The chip size is noted A x B where A is the number of cells, B the size (bits) of a cell. eg., 64k x 8 is a chip with 64k cells of 8bits each. When the data space in the cell = 8 bits then the corresponding address space is called as Byte Address. A Word Addressable chip would be 64k x 16.

Soleil
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