When I use $writememb
in Verilog to write contents in a memory to a text file, the result shows as below. But, I don't need the address comment. How can I cancel the comment when using $writememb
? I use iverilog
to compile my design.
// 0x00000000
00000000000000000000000000000001
00000000000000000000000000000010
00000000000000000000000000010100
00000000000000000000000000010000
00000000000000000000000000000100
00000000000000000000000000000011
11111111111111111111111111111111
11111111111111111111111111111100
00000000000000000000000000000100
00000000000000000000000000000000
00000000000000000000000000000001
11111111111111111111111111111000
11111111111111111111111111110000
00011111111111111111111111111111
00001111111111111111111111111111
11111111111111111111111111111110
// 0x00000010
11111111111111111111111111111100
I want a result like this:
00000000000000000000000000000001
00000000000000000000000000000010
00000000000000000000000000010100
00000000000000000000000000010000
00000000000000000000000000000100
00000000000000000000000000000011
11111111111111111111111111111111
11111111111111111111111111111100
00000000000000000000000000000100
00000000000000000000000000000000
00000000000000000000000000000001
11111111111111111111111111111000
11111111111111111111111111110000
00011111111111111111111111111111
00001111111111111111111111111111
11111111111111111111111111111110
11111111111111111111111111111100