ARM Cortex A53 L1 Data cache eviction

Question

I am trying to evict the L1 data cache of arm cortex a53, I have two threads running on the same core, first thread is performing array calculations and it is really small so the cache can cache its entries and the second thread is executing the below eviction, when I measure the execution time of first the thread I don't see any change with or without the evicting thread. Did I do something wrong ?

uint8_t c[NUM_CACHE_LINES * CACHE_LINE_SIZE];

void evict_l1_cache() {
    // Access memory in a strided pattern to evict the L1 cache
    uint32_t stride_counter = 0;
    uint32_t stride = STRIDE;
    for (uint32_t i = 0; i < NUM_CACHE_LINES * STRIDE_PERIOD; i++) {
        c[(i * CACHE_LINE_SIZE * stride) % (NUM_CACHE_LINES * CACHE_LINE_SIZE)] = 42;
        if (++stride_counter == STRIDE_PERIOD) {
            stride_counter = 0;
            stride = (stride + 1) % (NUM_CACHE_LINES / 4);
        }
    }
}