I have done the problem with AND , OR and NOT gates but cant figure out how to do with NAND and NOT gates.
I dont know how to implement the NAND gate for this boolean expression.
I have done the problem with AND , OR and NOT gates but cant figure out how to do with NAND and NOT gates.
I dont know how to implement the NAND gate for this boolean expression.
Using DeMorgan's Laws:
xy + x'y' + yz
(xy)'' + (x'y')'' + (yz)'' // all ANDs converted to NOT'd NANDs
((xy)''' (x'y')''')' + (yz)'' // first OR converted to NAND w/ args NOT'd
(((xy)''' (x'y')''')'' (yz)''')' // second OR converted to NAND w/ args NOT'd
(((xy)' (x'y')')'' (yz)')' // extra NOT's removed