0

I compile my C code with aarch64-none-elf-gcc and I add option -mcpu=cortex-a53+nofp. However it seems that the "+nofp" doesn't work and I still get FP instructions (3d8047e0). Could anyone help me to solve this?

Disassembly of section .text.snprintf:

00000042000014d0 <snprintf>:
  42000014d0:   a9a47bfd    stp x29, x30, [sp, #-448]!
  42000014d4:   900002e9    adrp    x9, 420005d000 <strlen+0xc0>
  42000014d8:   b2407be8    orr x8, xzr, #0x7fffffff
  42000014dc:   910003fd    add x29, sp, #0x0
  42000014e0:   f9000bf3    str x19, [sp, #16]
  42000014e4:   3d8047e0    str q0, [sp, #272]

null.......................

Perry
  • 1
  • 1

1 Answers1

0

Cortex a53 is an armv8 -processor, which does have ASIMD aka NEON instruction set as mandatory. q0 is a generic register that can hold and operate on both integer and fp data; this instruction does not imply that the content is floating point.

Aki Suihkonen
  • 19,144
  • 1
  • 36
  • 57
  • I am a IC verification engineer. I am verifying a SOC and the designer implements the A53 with configuration NEON_FP as FALSE. So it cannot decode FP instructions (3d8047e0) and goto unwanted exception. There is a similar question https://stackoverflow.com/questions/31274130/linaro-gcc-aarch64-none-elf-4-9-2015-03-issue-with-neon. But I don't know how to recompile libc. – Perry Mar 23 '23 at 02:21
  • @Perry: Unfortunately, you'll probably have to not only recompile libc but actually replace it. The `+nofp` won't magically allow you to use floating-point features of C (via emulation or whatever), it will merely make the compiler abort instead of emitting fp instructions. So any code that contains `float` or `double` anywhere, such as the source for `printf`, will no longer compile. You may have to find a stripped-down integer-only libc, or manage to write your tests without the benefit of a hosted C implementation. – Nate Eldredge Mar 26 '23 at 00:29
  • @Perry: There's a similar question at https://stackoverflow.com/questions/75586351/software-floating-point-library-for-arm-aarch64. Basically, it seems like ARMv8 without FP is considered an obscure combination that mainstream OS and toolchains don't really support. As such, I am curious who your designer thinks is going to buy this chip, or what they expect to be able to do with it. – Nate Eldredge Mar 26 '23 at 00:37
  • Thanks. This is a pre-research project, and FPU will be supported in the future official chip. – Perry Mar 27 '23 at 14:47