I'm writing a simple simulation of a microprocessor, and, for the JNC instruction, I am unsure if the carry bit is automatically reset after the JNC instruction. Is it (generally, although different cpu architectures might not solve it the same way there are probably trends)?
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With most ISA's that employ flags, there is no point to clearing after testing; specific instructions positively set flags, effectively erasing/overwriting the old flags values. – Erik Eidt Dec 06 '22 at 01:32
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Thanks! Very helpful. Yes any instructions that obviously do affect carry flag, like, ADD, will "reset" it (set it to carry of that operation) automatically regardless, so, whenever carry flag has to be evaluated, something that would affect it will have been run regardless. Makes sense. Also the answer from Peter Cordes was very helpful too. – BipedalJoe Dec 06 '22 at 18:26
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On normal CPUs, branch instructions only read flags, they don't modify them, as you can see from looking at popular existing ISAs such as
- x86
jnc(https://www.felixcloutier.com/x86/jcc) - AArch64 BHS (Higher or Same) (https://courses.cs.washington.edu/courses/cse469/19wi/arm64.pdf ISA quick reference with RTL notation showing only PC being updated)
- 6502/6510 (https://www.c64-wiki.com/wiki/BCC)
Just like how add dst, src or mov dst, src doesn't zero the source.
A pure branch instruction only writes the program counter, no other side-effects. Some ISAs with FLAGS may also have a sub-and-branch instruction like x86's loop, although that doesn't use CF at all.
Peter Cordes
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