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I try to halt a F746zg core with pyocd via ST-LinkV2. The ST-Link sees the core. But I'm not able to erase and reprogram it until it's halted. Does anyone know what the right command is to do that?

I tried:

pyocd reset -l -t 'stm32f746zg'

But I get:
W Invalid coresight component, cidr=0x0 [rom_table]

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1 Answers1

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I had the problem that the system was not flashable from remote with following command:

pyocd flash -e sector -a 0x8000000 -t 'stm32f746zg' -O reset_type=hw -O connect_mode='under-reset' zephyr.elf

But the following procedure seems to work for me.

  1. Halt the system
pyocd reset -l -t 'stm32f746zg' -O reset_type=hw -O connect_mode='under-reset'
  1. Erase sector and flash
pyocd flash -e sector -a 0x8000000 -t 'stm32f746zg' zephyr.elf
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