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In risc-v, beq instruction has 12bits of imm[12:1].

And PC-relative addressing is Target address = PC + immediate x 2

It says the reason of the multiply with 2 is for the half word instruction.

So, I think the immediate value can represent the range of [-2^12 ~ 2^12-2],

because of the hidden bit in imm[0] == 0.

And multiplying with 2 makes the range as [-2^13 ~ 2^13-2].

So, when we think in 2 byte increments instruction, the branch can reach in range of

-2^12 ~ 2^12-2

and in 4 byte increments instruction, the branch can reach in range of

-2^11 ~ 2^11-2.

But in risc-v org page 29 https://riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf,

it says the conditional branch range is -4KiB ~ 4KiB,

which means -2^10 ~ 2^10 in 32-bit instructions.

Q1. In PC relative addressing, Is it right we use 13bits result (with hidden 0bit) in calculation?

Q2. If it is right, how can I calculate the range of the branch instruction?

Erik Eidt
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Jin
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1 Answers1

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Q1. In PC relative addressing, Is it right we use 13bits result (with hidden 0bit) in calculation?

Yes, as you note, the formula that the processor uses is

Target address = PC of the branch instruction + immediate x 2

The x2 reintroduces that 13th bit that is known to be zero and hence stripped away during encoding.

Q2. If it is right, how can I calculate the range of the branch instruction?

You have the right idea.

The encoded immediate value is 12 bits wide, so the value added to the PC is 13 bits wide (immediate x 2).  The immediate is a signed field.

The maximum immediate is positive, and is a 0 bit followed by 11 bits of 1's, which is 2047 (aka 0x7FF or 2^11-1), and the minimum immediate is negative, and is a 1 bit (sign) followed by 11 bits of 0's, which is -2048 (aka 0x800 or -2^11).

Therefore the maximum forward range is a 0 bit followed by 11 bits of 1's followed by 1 bit of 0, which is 4094 (aka 0xFFE or 2^12-2).

While the maximum backward range is a 1 bit followed by 12 bits of 0's, which is -4096 (aka is 0x1000 (in 13 bits) or -2^12).

Let's note, that it is common to speak of range in terms of bytes on byte-addressable machines.  Instruction addresses are byte addresses (even, for example, if all the instructions are the same 32-bit size).  so the (byte) range is -4096 .. +4094 — these are the instruction addresses that can be reached.

However, if you want to consider how many 16-bit instructions can be reached, we would divide that byte range in half, so -2048 .. +2047, and if considering how many 32-bit instructions can be reached, we would divide that byte range in quarter, so -1024 .. 1023.5 .

Erik Eidt
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  • Thank you for your answer, but I have something confused that the (byte) range is -4096 ~ 4094. I understand that in calculation the ```immdidate``` is 12bits and multiplying with 2 makes it 13bits, which remark that the LSB is 0 (Imm[0] == 0). Is it the right way? – Jin Oct 10 '22 at 23:34
  • If `imm` refers to the instruction encoded immediate (e.g. imm[12:1]), then it is not that `imm[0] == 0` but that `(imm x 2) [0] == 0`. That 0 bit is removed in encoding and restored later in execution. – Erik Eidt Oct 10 '22 at 23:35
  • 11 signed bits can range from -2048 to 2047. If you want to interpret that range in terms of 8-byte items, divide by the range by 8, so upper and lower each by 8, so -256 .. 255.875 . – Erik Eidt Oct 10 '22 at 23:48
  • (Some instruction sets will multiply the store/load immediate by the element size, so can reach further for larger item (load/store) size; that means only aligned addresses can be reached. However, RISC V does not do this multiplication.) – Erik Eidt Oct 10 '22 at 23:51