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I don't understand how MIPS would implement the sll (shift left logical) instruction using the hardware present in its ALU as shown in the diagrams below. Would anyone be able to clarify what would be happening in it when it's executing an sll command? Thanks

enter image description here Source: MIPS ALU

Ken Ely
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  • Although this site has many people that can answer your question, https://electronics.stackexchange.com/ may also help. – xiver77 May 26 '22 at 09:51
  • @xiver77 I've just posted the same question there. Here's the link if you want it https://electronics.stackexchange.com/questions/621110/how-is-sll-implemented-in-mips – Ken Ely May 26 '22 at 10:03
  • Please delete this question. See: [Is cross-posting a question on multiple Stack Exchange sites permitted if the question is on-topic for each site?](https://meta.stackexchange.com/questions/64068) – Dalija Prasnikar May 28 '22 at 08:13

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