What do we do when we have to create a scoreboard for a certain design logic? For a memory I understand that we can compare the data written to DUT at a certain address to the data read at the same address. Suppose for a basic example of full adder how do we maintain a scoreboard. What values do we compare and what method will we be using?
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In UVM terminology, a scoreboard it a component that coordinates checking the expected results against the actual results. The expected results gets generated either inside the scoreboard, or as a separate component called a predictor or golden reference model.
Regardless of whether you are verifying a simple full adder or a complex CPU, a UVM testbench applies stimulus to both the DUT and reference models, and the scoreboard must know when to look at the actual results and do the comparison with expected results.
dave_59
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What I've done is - created cases for verifying the output from the DUT (full adder) and seeing if the output matches for the given inputs to the DUT. Is this type of verification any good? – Bunty Bhai Mar 30 '22 at 08:17
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For a full adder, there is not much else you can do. – dave_59 Mar 30 '22 at 14:44
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Typically scoreboard is used to compare the data as you have mentioned in your question. Every scoreboard has a reference model (just the functionality of DUT).
For a full adder, you will implement the variables(declared in scoreboard) addition and receive the values from the monitor through the interface and your reference model calculates the sum and carry. This is compared with the sum and carry coming out of DUT captured by the monitor.
shawn_reeds
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