I want to do an image processing by openCV on FPGA . But I do not know if I should use the SDsoc method or the vivadoHLS method. The size of the images I am going to process is large and I want to solve the problem through parallel processing. What are the differences between SDsoc and vivado HLS? Which method is suggested to get the job done faster? .I want to use one of the cheap Zynq-7000 FPGAs.
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perhaps try the **electronics** stack exchange. https://electronics.stackexchange.com/ – Christoph Rackwitz Mar 12 '22 at 13:03
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Question:
vivado HLS or SDsoc for use openCV
Answer:
Without any doubt you should use Vitis for openCV because remember after 2019.1 there is no support of Xilinx SDSoC development environment. And also Vivado-HLS is now Vitis HLS. Furthermore, Vitis has a number of openCV libraries that will help you implement your design on Zynq devices.
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Depending whether you inherited past SDSoc design or starting anew previous answer may or may not help you. Besides just tool naming changes Xilinx changed shells (support logic). My advice is stay with the old tool version for inherited projects. – My Name Mar 18 '22 at 13:30