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I am a beginner of computer architecture. I try to learn Y86 architecture. I got this reference for the Y86 architecture. I did not understand the picture Stage computation: Arith/log. ops. I have studied the book Computer Systems: A programmer's Perspective but the things are not clear to me

  1. M1[PC]
  2. M1[PC+1] and other lines

As per the book, M1[x] indicates accessing (either reading or writing) 1 byte at memory location x. That means M1[PC] means accessing(either reading or writing) 1 byte at memory location program counter. Is that make sense?

  1. valP <- PC+2

But why it is PC+2 and not any other integer.

I also came to know from the book In the fetch stage, we do not require a constant word, and so valP is computed as PC + 2

But then again It is also possible fetches a 4byte constant word valC

So suppose, there is another line in the above example after rA:rB<-M1[PC+1] is valC<- M4[PC+2] then what will be the next line valP<-PC +______

Here I try to solve a small program following the link I refer here

Stage:  addq V, rB

Fetch:  icode : ifun ← M1[PC]

        rA : rB ← M1[PC+1]
        valC ← M8[PC+2]
        valP ← PC + 10

Decode: valB ← R[rB] 

Execute:    valE ← valB + valC

Memory:  

Write back: R[rB] ← valE 

PC update:  PC ← valP

Edited: I edit this question and try to understand how much knowledge I gain from the link.

Is my code alright?

Encipher
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    It's `PC+2` because the arithmetic/logical instructions are 2 bytes in length. See the instruction set table earlier in the linked page. For other instructions that take a `valC` you will need additional increment to `valP`. – Jester Feb 03 '22 at 00:14
  • I edited my question and try to solve a code block. Can you please take a look am I got it alright or partially correct? – Encipher Feb 03 '22 at 02:45
  • There is no `addq V, rB` unless you are using a different ISA than what you linked. Also your execute uses `valA` instead of `valC`. – Jester Feb 03 '22 at 10:53
  • I have edited valA with valC. Is it alright? – Encipher Feb 03 '22 at 14:04
  • Looks okay now. – Jester Feb 03 '22 at 14:22
  • I have understood from your previous comments why I need to write PC+10 in fetch cycle. Can you please explain it once again? I would like to see am I in the right track or not. Thank you. – Encipher Feb 03 '22 at 15:21
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    2 bytes for the instruction, 8 bytes for the `valC` operand. – Jester Feb 03 '22 at 15:27
  • Can you please take a look one of my other question https://stackoverflow.com/questions/70921787/bubble-sort-implemented-by-y86-program-code – Encipher Feb 03 '22 at 19:47

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