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I'm currently working on systems that include embedded Linux and FPGAs. We've various IP cores that support the AXI-Bus. To communicate with the IP cores of PL (programable logic), we need to map them onto the address space of the PS (processing system). For example, for the widely used Zynq PS the address space is as follows (UG585 - Section 4.1: Address Map)

  • 0x0000_0000 to 0x7FFF_FFFF: Mapped to the physical memory. Either external DDR or on-chip memory
  • 0x8000_0000 to 0xBFFF_FFFF: Mapped to the PL explained above
  • 0xE000_0000 to 0xFFFF_FFFF: Various other devices on the chip

As you can see, only the first 1GB of the address space is reserved to the physical memory, and the rest is occupied by the devices either in PL or PS. So, if possible, the virtualization range can be applied only for the first 1GB to allow faster access to devices on the chip by skipping the MMU.

I know that by doing such a modification we allow any kind of process to access the physical devices of the system without any control of its privileges. So, the questions are

  • Is it possible to partially virtualize the physical address space in Linux or any other OS?
  • If it is possible, would it be rational to do it?
Caglayan DOKME
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    On what kind of machine? On a typical CPU you would just do this with the usual MMU, perhaps reducing the overhead further with features like huge pages. – Nate Eldredge Jan 24 '22 at 07:15
  • @NateEldredge Would it differ across different machines? I knew that the MMU is the core part of the virtualization process. Does this MMU thing have a configuration option so that we can partially virtualize the address space? And, would it be beneficial to do so? – Caglayan DOKME Jan 24 '22 at 07:32
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    Yes, every architecture has its own MMU design, with different features and functionality. I don't know offhand of any that has such a "partially disable" feature. But that doesn't mean there couldn't be some out there. – Nate Eldredge Jan 24 '22 at 07:35
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    AFAICT the only benefit, compared to just mapping that range into the virtual address space normally, is that you save the cost of a page table walk the first time you access each page. After that, the page's info is in the TLB and there's typically no extra cost per access. Huge pages cut down that cost because far fewer page table walks are needed, and far fewer TLB entries are used up. – Nate Eldredge Jan 24 '22 at 07:38
  • @NateEldredge Looks like I omitted the page table entries cached in the TLB. Are you sure that no extra cycles will be used to access the physical memory if I already have the corresponding page table entry in the TLB? I could have reached the memory without even touching the MMU. – Caglayan DOKME Jan 24 '22 at 07:54
  • CPUs I've worked with are *heavily* optimized to work with the TLB. If there were a way to bypass it, it would be slower, not faster. – prl Jan 24 '22 at 09:29

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