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I can declare a bunch of empty lists as:

a,b,c = [],[],[]

or

a,b,c = [0]*16,[0]*8,[0,1,2]

Is there a more concise way to declare a bunch of lists?

(I have also used list comprehensions, and dedicated classes to do it, and am just looking for a more terse way to do it.)

Edit:

Here is a simplified explanation of one use case: In Verilog I might do something like:

wire [31:0] a, b, c, d, e;

or

input [7:0] in1, in2, etc.

In C++, I might model this using instances of a class Wire like:

Wire32 a, b, c;

In Python, if I were to use a class approach, one approach might be:

    a = Wire32() 
    b = Wire32() 
    c = Wire32()

which seems a bit verbose to me. It gets even more complex when passing through MyHDL blocks. Still, I'm hoping this might be a reasonable simplification of the use case that might lead to relevant creative solutions.

My current solution is:

a,b,c = [Wire(32) for i in range(3) ]

I do not like a couple things about this solution:

1.  I have to count the number of elements which is cumbersome and error-prone
2.  The definition is after the list which is unfamiliar to the "customer" who will likely be a hw engineer familiar with Verilog
user3761340
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  • Note that it is bad practice to declare multiple variables on the same line in the first place. – SuperStormer Dec 23 '21 at 20:07
  • Both the ways you mentioned are elegant and are pythonic ways to define list depending on your usage. What's the problem in defining the list this way? Is there anything bothering you? Please share more details about the problem you are seeing here, then probably we'll be able to assist you better – Moinuddin Quadri Dec 23 '21 at 20:08
  • "Sequence multiplication" is probably as terse as you can get when mutability isn't a concern. `[0]*8` is only 5 characters. – Carcigenicate Dec 23 '21 at 20:08
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    What you have is already *more* terse than most people would want in production code. Is this code about code golf, where style is abandoned for brevity? – Blckknght Dec 23 '21 at 20:10
  • Good point Moinuddin. I am using MyHDL and trying to create a group of busses for a BFM (bus functional model). MyHDL creates ports in a way half-way between an HDL and Python. I will try to provide more detail without overcomplicating the question with MyHDL specifics. – user3761340 Dec 23 '21 at 20:16
  • Between this question and your last, I feel like you're asking a better way to handle a large number of lists without explicitly typing all of it out. Perhaps using classes, config files, or list of lists would be a better alternative but it's hard to tell without a clearer picture of the use case. – r.ook Dec 23 '21 at 20:18
  • OK, let me work on a simple version of the use case. Thanks. – user3761340 Dec 23 '21 at 20:20
  • Here is a simplified explanation of one use case: In Verilog I might do something like: wire [31:0] a, b, c, d, e; input [7:0] in1, in2 etc. In C++, I might model this using instances of a class Wire like: Wire32 a, b, c; In Python, if I were to use a class approach, one approach might be: a = Wire32() b = Wire32() c = Wire32() which seems a bit verbose to me. it gets a bit more complex when passing through MyHDL blocks. Still, I'm hoping this might be a reasonable simplification of the use case that might lead to relevant creative solutions. – user3761340 Dec 23 '21 at 22:10
  • Another solution I just now conceived might to use a list comprehension on the right, and the list of object names on the left. Something like this: a,b,c = [Wire(32) for i in range(3) ]. This is what I will use for now, and would be happy to see any other suggestions. – user3761340 Dec 24 '21 at 01:06
  • A couple things I do not like about it include that the range variable has to be meticulously maintained to equal the number of instances on the left, and it seems less natural to have the type after the variable names. There may be a good way to create a function that does it something like: My32BitWireFactory(a,b,c), but then I would still have to declare a,b,c as references somehow, perhaps by passing in lists, or something. C-style macros could help solve some of these types of aesthetics. Still looking for a familiar look/feel for hardware developers moving to Python. – user3761340 Dec 24 '21 at 01:29
  • @r.ook , is the comment above useful as an example of my use model? Thanks for your help! – user3761340 Dec 28 '21 at 19:44
  • I don't think there's much you can do. Fundamentally Python embraces "Explicit is better than Implicit" and that object assignments are always defined as `name_being_assigned = object_to_assign` so the separate lines are the most explicit, clear, and accepted method of assignment in Python. If you try to shortcut it anyhow it'll either be needlessly complicated and/or confuses the reader. Remember readability is important and sacrificing it in the quest of being terse might ultimately make it a fruitless one. Just my 2 cents. – r.ook Jan 06 '22 at 19:42

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