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I have the following lines

la x14, L2
sw x13, 0(x14)

where the address of L2 is 0x2018.

When I generate the ELF file and inspect it using objdump, this is what I see (relevant parts only):

...
1018: auipc   a4,0x1
101c: mv      a4,a4
1020: sw      a3,0(a4) # 2018 <L2>
...

The line at 1018 i.e. mv a4 a4 translates to addi a4, a4, 0 which is redundant. Why is this generated? Won't it still work without this line?

Does gcc have a requirement to always generate 2 instructions for the la instruction?

Plasty Grove
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1 Answers1

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la is a pseudo command for RISC-V.

See, for example, it is described in the book RISC-V assemly language programming, chapter 4.10.2 "The la Pseudoinstruction".

Alexey Vazhnov
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  • Thanks, yes but what is the need to generate `mv a4, a4`? That's basically the same as a `nop`. – Plasty Grove Nov 11 '21 at 23:40
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    `mv a4, a4` is the same as `addi a4, a4, 0`. In your case, there is a relocation pointing to it so that the linker can replace the `0` with a suitable value. In case the value remains zero, the instruction is removed. This process is known as *linker relaxation*. – Lindydancer Nov 17 '21 at 13:43