I've created a receiver design for a UART. Testing with stimuli on the testbench does indeed show correct functionality. What I am now to try is to test it on real hardware, but I am not sure how to be able to send data serially from the PC to the FPGA with a specific baud rate.
Desired output data_out_sim
(shown as ASCII) for binary input data_in_sim
People have been mentioning using pySerial but I am not sure how to make the connection between code and hardware design.