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I've created a receiver design for a UART. Testing with stimuli on the testbench does indeed show correct functionality. What I am now to try is to test it on real hardware, but I am not sure how to be able to send data serially from the PC to the FPGA with a specific baud rate.

Desired output data_out_sim (shown as ASCII) for binary input data_in_sim

People have been mentioning using pySerial but I am not sure how to make the connection between code and hardware design.

  • *"I am not sure how to be able to send data serially from the PC ..."* -- Exactly what interface does your project present to the PC? A UART (with TTL signals or RS-232)? Or the FPGA side? *"... but I am not sure how to make the connection between code and hardware design."* -- That's because you have not clearly established what interface of the PC you will use for this *"connection"*. The *"FPGA design on ZedBoard"* part of your title is irrelevant to the actual problem. You neglect to clearly define the PC and its OS. – sawdust Oct 06 '21 at 01:36
  • *"Desired output `data_out_sim` ... for binary input `data_in_sim`"* -- Without a reference point the terms *"input"* and *"output"* are ambiguous and therefore essentially meaningless. – sawdust Oct 06 '21 at 01:44

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This is not a particularly well formulated question.

A common way to do this is with an FTDI cable or similar USB to UART bridge

Stephen Klein
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  • Thanks for your reply. The USB to UART bridge connection is made but I am not entirely sure on how to send data similar to as shown in the simulation image `data_in_sim` directly from my PC and to the board. How can I make either **Python** or maybe **C** script communicate with my hardware design? – abahadoran Oct 05 '21 at 19:12
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    As it’s currently written, your answer is unclear. Please [edit] to add additional details that will help others understand how this addresses the question asked. You can find more information on how to write good answers [in the help center](/help/how-to-answer). – Community Oct 06 '21 at 00:10