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I've realized that the 3 ways to make an I/O connection :

1- Programmed I/O (polling)

2- Interrupt-Driven I/O

3- Direct Memory Access (DMA)

now, I need to relate this with the reality of how accessing I/O addresses is done

(Isolated I/O || Memory-mapped I/O) :

DMA

Memory mapping does not affect the direct memory access (DMA) for a device, because, by definition, DMA is a memory-to-device communication method that bypasses the CPU.

this is all information I have.

  • now, what about Interrupt-driven and Programmed I/O, what is the addressing modes are used in these cases?

  • Does a microcontroller can do both addressing modes (Isolated/memory-mapped) or only one choice?

Am I understanding the topics right now, or there are any misconceptions?

Ali K.
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1 Answers1

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Port mapped vs memory mapped (Communication)

This is how the IO access is performed, i.e. how the CPU communicates with the device.
With port mapped IO the CPU uses special instructions (e.g. x86's in and out) to read/write from a device in a special IO address space you can't access with load/store instructions.
With memory mapped IO the CPU performs normal memory loads and stores to communicate with a device.
The latter is usually more granular and uniform when it comes to security permissions and code generation.

Polling vs Interrupt driven (Notification)

This is how notifications from the devices are received by the CPU.
With polling the CPU will repeatedly read a status register from the device and check if a completion bit (or equivalent) is set.
With interrupt driven notifications the device will raise an interrupt without the need for the CPU to do any periodic work.
Polling hogs the CPU but has less latency for some workload.

DMA vs non-DMA (Transfer)

This is how the data is transferred from the device to the CPU.
With DMA the device will write directly into memory.
Without DMA the CPU will have to read the data repeatedly (either with port or memory mapped IO).

All these three dimensions are independent of each other, you can combine them however you like (e.g. port mapped, interrupt driven, DMA).
Note, however, that the nomenclature is not consistent in the literature.
Also, different devices have different interfaces that may not need all of the three dimensions (e.g. a very simple output-only GPIO pin may have a single write-only register, so it makes no sense to talk about polling or DMA in this case).

Peter Cordes
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Margaret Bloom
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  • This is an AVR question; AFAIK AVR doesn't have any security / permissions for memory. (I think it does have special IO instructions, but those may just be an offset to the normal address, not a different address-space.) Or is [atmega32] an ARM? Weird tags, then. – Peter Cordes Oct 05 '21 at 18:29
  • @PeterCordes The question is not addressed at atmega or AVR. The OP just spammed a few tags, I think. It's the kind of generic notions you find in introductory books or courses. And so was my general answer. – Margaret Bloom Oct 05 '21 at 22:08
  • Yeah, that makes sense. I edited your answer to make the port IO example be *x86*'s `in` and `out` instructions, to make it clearer that they might not have those names (or even exist) on other ISAs. I suppose ISAs like without special instructions have to map PCI IO space to some range of memory, if they want to access it at all? I know Alpha had a range of memory where word accesses would do byte MMIO accesses, maybe something similar for ports, since Alpha systems did want to be able to use PCI devices. – Peter Cordes Oct 05 '21 at 22:14
  • pmio can also be used with regular instruction on arch like alpha, but it is distinguished with the last bit of physical address – Chen Li Oct 20 '21 at 04:14
  • @ChenLi Other archs also do that. I'm not sure if that's port mapped IO or memory-mapped IO. Memory-mapped IO ranges on x86 must be mapped so they don't overlap memory and in the end the requests take a different path in bus topology. It's not as simple as testing the MSb but it's alike. I think I've read somewhere the Alpha's IO as memory mapped (but may be remembering wrong). – Margaret Bloom Oct 20 '21 at 07:54