I'm working on an Altera Cyclone V SoC. I'm attempting to write directly to FPGA peripherals from my SoC, however, the hwlib library only contains the function alt_write_word, which I understand that this function writes to the cache first before writing it to the main memory. In NIOS II, the built in function IOWR has already configured the memory so that the IOWR function writes directly to the FPGA peripherals. So, my question is, when I'm working with SoC, if the hwlib library doesn't provide such a function, how can I write directly to the FPGA peripherals ? Do I need to configure the memory type or what ?
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of course you can, you just need to know the address in the arm address space for things. Granted if you have an operating system or mmu in the way then you have to work with those to get directly at the hardware without protection faults or caching – old_timer Oct 01 '21 at 11:59
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After some research, I'm trying to setup the page table in the MMU for the LWFPGA slaves region as strongly-ordered memory type. Do you have any ideas how to do this – LowK Oct 02 '21 at 04:23
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I assume that your application If your application is bare-metal and thus you are not using the MMU (i.e. virtual addresses), you can try to reach the peripherals directly by pointing them with a volatile qualified pointer. Here is a little example:
volatile uint32_t* registerAddress = PERIPHERAL_BASE_ADDR;
const uint32_t registerValue = *registerAddress;
It is also possible to write onto them if the hardware permits it.
*registerAddress = 0xDEADBEEF;
The addresses of peripherals should be excluded from the cacheable range. If you are already using an SoC with a dedicated bus architecture, then you don't need to worry about it. Otherwise, you might need to adjust your cacheable range when designing the system.

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