1

I am using RVDS6_13 compiler and my processor is Cortex X1 (HERA). For a test where I need to do a bit of assembly language programming, I am getting below error in compilation:

Error: A1616E: Instruction, offset, immediate or register combination is not supported by the current instruction set 9 00000000 MOV x28,0xD02E7F30

Basically I need to load 0xB41138A4 to address location 0xD02E7F30 and below is my code:

 MOV  x28,0xD02E7F30  
 STR  x28,0xB41138A4
Peter Cordes
  • 328,167
  • 45
  • 605
  • 847
user3565150
  • 884
  • 5
  • 21
  • 49
  • Wouldn't you need something like `mov w28, 0x7F30`, `movk w28, 0xD02E, lsl 16`? Also, that `STR` doesn't look like ARM assembly to me. Typically you'd load the address into a register first, and then use `[reg]` as the second operand (where `reg` is the register you placed the address in). – Michael Sep 16 '21 at 08:21
  • Thank you Michael, actually I was thinking if x28, x29 are 32 bit registers, then why I cannot load the address and data directly with 32 bit word and then through STR instruction I will load the address with the data. But seems though these are 32 bit registers, I have to split it into two 16 bit operations and left shift as you suggested to effectively get a 32 bit operation. – user3565150 Sep 16 '21 at 18:44

1 Answers1

4

Load the value with the special “literal pool” LDR instruction and the partial address (everything but the low 12 bits) with the ADRP instruction. Then store with the remaining address bits as a displacement:

LDR w28, =0xD02E7F30
ADRP x29, 0xB4113000
STR w28, [x29, 0x8A4]

(I have changed your store to be a 32 bit store as I assume you've mistakingly used a 64 bit store)

Instead of the ldr w28, =... instruction you can also use a MOVZ/MOVK pair to get rid of the literal pool load:

MOVZ w28, 0x7F30, LSL #0
MOVK w28, 0xD02E, LSL #16
ADRP x29, 0xB4113000
STR w28, [x29, 0x8A4]

If your binary is supposed to be position independent, you'll also have to load the address using LDR w29, =... or MOVZ/MOVK as ADRP loads a PC-relative address:

MOVZ w28, 0x7F30, LSL #0
MOVK w28, 0xD02E, LSL #16
MOVZ x29, 0x38A4, LSL #0
MOVK x29, 0XB411, LSL #16
STR w28, [x29]
fuz
  • 88,405
  • 25
  • 200
  • 352