0

For example the RISC-V ISA define four different multiplication instructions:

  • MUL: signed x signed
  • MULH: signed x signed
  • MULHU: unsigned x unsigned
  • MULHSU: signed x unsigned

My question is: is it possible to reuse a single signed multiplier to perform all the instructions above? Or the opposite (using a unsigned multiplier).

Peter Cordes
  • 328,167
  • 45
  • 605
  • 847
Gabbed
  • 37
  • 1
  • 7
  • 1
    Probably, but only with limitations such as If all of the numbers are positive and don't use the most significant bit, and the result doesn't overflow into the most significant bit if using signed. Are you asking us to prove something specific for you? – Dave S Aug 08 '21 at 19:12
  • @DaveS Thanks, I was trying to implement a small processor in an FPGA using Vivado, and i didn't know if I had to use 3 different multiplier (signed x signed, unsigned x unsigned, signed x unsigned) or a single one. From what I understanded I need to use 3 different multiply block. (is that right?) – Gabbed Aug 08 '21 at 19:26
  • 2
    Consider -1 x 10. It will overflow if you treat both as unsigned x unsigned. Yes, you could use 3 blocks instead of 4 if you can always adjust the order to make it (signed x unsigned) never (unsigned x signed). I'm not a CPU designer but I wonder if the RISC design cheats and has one (s x u) block plus a simpler (u x s) block that just flips the inputs and then feeds it into the first block? – Dave S Aug 09 '21 at 16:52

0 Answers0