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I am trying to understand why LLVM has the concept of a "vector type". Could LLVM have been designed without one and could vectorization/SIMD be implemented on top of the array type?

It seems to me that a [8 x float] could be mapped to a vector register in the same way as a <8 x float>.

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    I believe LLVM distinguishes between the two types because not all valid ArrayType element types are valid SIMD/vectorization VectorType element types. – Mats Jun Apr 07 '21 at 09:10

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