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I've created a pretty generic PetaLinux 2020.1 project for my MicroZed board, and built everything successfully. I believe I've got the SD Card properly configured, and my RootFS is in place. FSBL/U-Boot properly load and run, but when it comes to booting Linux, it crashes with the following output on the console.

Booting Linux on physical CPU 0x0
Linux version 5.4.0-xilinx-v2020.1 (oe-user@oe-host) (gcc version 9.2.0 (GCC)) #1 SMP PREEMPT Sat Feb 13 19:25:18 UTC 2021
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt: Machine model: xlnx,zynq-7000
earlycon: cdns0 at MMIO 0xe0001000 (options '115200n8')
printk: bootconsole [cdns0] enabled
Memory policy: Data cache writealloc
cma: Reserved 16 MiB at 0x3f000000
percpu: Embedded 15 pages/cpu s31948 r8192 d21300 u61440
Built 1 zonelists, mobility grouping on.  Total pages: 260416
Kernel command line: console=ttyPS0,115200 earlycon root=/dev/mmcblk0p2 rw rootwait
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
mem auto-init: stack:off, heap alloc:off, heap free:off
Memory: 1010888K/1048576K available (6144K kernel code, 217K rwdata, 1844K rodata, 1024K init, 131K bss, 21304K reserved, 16384K cma-rese)
rcu: Preemptible hierarchical RCU implementation.
rcu:    RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
        Tasks RCU enabled.
rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
efuse mapped to (ptrval)
slcr mapped to (ptrval)
irq-xilinx: /amba/axi-interrupt-ctrl: num_irq=32, edge=0x0
8<--- cut here ---
Unhandled fault: imprecise external abort (0xc06) at 0x00000000
pgd = (ptrval)
[00000000] *pgd=00000000
Internal error: Oops - BUG: c06 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.4.0-xilinx-v2020.1 #1
Hardware name: Xilinx Zynq Platform
PC is at xintc_write+0x10/0x1c
LR is at xilinx_intc_of_init+0x138/0x2a4
pc : [<c033fca0>]    lr : [<c0a161e4>]    psr: 600000d3
sp : c0b01f38  ip : ef00a0c0  fp : c0869cc4
r10: 00000122  r9 : f0808000  r8 : ef6f010c
r7 : ef6f5e88  r6 : ef00a000  r5 : ffffffff  r4 : f080800c
r3 : c033fc90  r2 : 00000000  r1 : ffffffff  r0 : f080800c
Flags: nZCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment none
Control: 18c5387d  Table: 0000404a  DAC: 00000051
Process swapper/0 (pid: 0, stack limit = 0x(ptrval))
Stack: (0xc0b01f38 to 0xc0b02000)
1f20:                                                       ef004380 00000000
1f40: ef00a000 c0a161e4 00000000 ef6f010c 00000008 ef0043c0 ef6f010c c0b01f74
1f60: c0b01f7c c0b01f74 00000100 c0a216d8 00000000 c0b01f74 c0b01f74 c0b01f7c
1f80: c0b01f7c c0b03c48 00000000 c0a2da30 c0b03c40 c0b364c0 00000000 c0b364c0
1fa0: 00000001 c0a2da40 00000000 c0a03558 c0b46088 c0a00b3c ffffffff ffffffff
1fc0: 00000000 c0a00578 00000000 c0a2da40 00000000 c0b03c48 c0a00330 00000051
1fe0: 10c0387d 00000000 1fff7000 413fc090 18c5387d 00000000 00000000 00000000
[<c033fca0>] (xintc_write) from [<c0a161e4>] (xilinx_intc_of_init+0x138/0x2a4)
[<c0a161e4>] (xilinx_intc_of_init) from [<c0a216d8>] (of_irq_init+0x1e4/0x288)
[<c0a216d8>] (of_irq_init) from [<c0a03558>] (init_IRQ+0x68/0x78)
[<c0a03558>] (init_IRQ) from [<c0a00b3c>] (start_kernel+0x224/0x440)
[<c0a00b3c>] (start_kernel) from [<00000000>] (0x0)
Code: e92d4070 e1a04000 e1a05001 f57ff04e (ebf74e45) 
random: get_random_bytes called from init_oops_id+0x20/0x3c with crng_init=0
---[ end trace 0000000000000000 ]---
Kernel panic - not syncing: Attempted to kill the idle task!
---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]---

I could use some advice on how to track down the underlying problem, probably some sort of misconfiguration on my part, as Google/StackOverflow did not lead me anywhere that seems applicable. Given how little I tried to change from an out-of-box setup, it seems this could be a common problem. Thanks!

Bob
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  • `git grep -n -w xintc_write` against Linux kernel source code in use will help you. – 0andriy Feb 17 '21 at 12:09
  • I only see a change in a patch file, that changes the signature: -static void xintc_write(struct xintc_irq_chip *irqc, int reg, u32 data) +static void xintc_write(void __iomem *addr, u32 data) I have no way to determine if that makes sense - I can understand the change. – Bob Feb 17 '21 at 23:50
  • I wonder why `xintc_write` is being pulled it - I don't have that component in my block diagram, just the processing system, some GPIO, and an unused timer... – Bob Feb 18 '21 at 00:13

1 Answers1

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I have figured out the problem - there is no xintc in my design! (This is what I was wondering about in my comment above).

What I don't understand is why Vivado/PetaLinux seemed to require one. My design was originally built using 2017.1 tools, and I did not include an xintc there. I now needed to enable the SPI controller in the ZYNC7 Processing System, which is the only HW change that I added. So, either that (enabling SPI0) or the new tools (2017.1 -> 2020.1) caused the new (undocumented?) requirement, unless of course, it was COVID-19...

Bob
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