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I have a quite stupid question about the accumulator, which I read is often made out of D-Flip-Flops, and the ALU. I don't get how the Accumulator can be one of the inputs for the ALU, but at the same time the location for the result. If the next result is stored in it, the ALU-Input and therefore the result of the ALU changes too, so it stores the next result in it and the ALU-Output changes again. For me this seems to be an endless loop during the clock signal is rising. Is the rising edge period so short that the register is to slow to change again, are MS-Flip-Flops used for this purpose or am I missing something?

(Sorry for my English, it is not my native language.)

Thanks!

BenediktS
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  • Yes, you use flip-flops that don't let the read outputs of the register change until the clock edge, so they're not passing through whatever temporary unstable values appear on the write input before then. It's not a momentary-enable that temporarily lets input keep changing the output, it's exactly one instantaneous sampling of the input that's triggered by the clock edge. (And/or the ALU is too many gate-delays long for it to be a problem!) – Peter Cordes Feb 11 '21 at 10:30
  • Thank you very much for your answer. Can you tell me, what specific Flip-Flop would be used? – BenediktS Feb 11 '21 at 12:28

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