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Someone told me that VFP is a hardware accelerator for floating-point arithmetic used in ARM processors.

But how does it "accelerate" the processor? I know the basic concepts of hard-floating and soft-floating, but it seems to me VFP does not completely fall into either one, because I have to give a different compiler option to use VFP, like -mfloat-softfp for gcc. So VFP is not just a kind of PFU, right?

Is VFP capable of hardware-level FP calculations? if so, how does it differ from normal FPU?

morimn
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  • Try to decode a float value, do the arithmetic, and re-encode it. You will then know what "accelerate" means. – Jake 'Alquimista' LEE Feb 04 '21 at 16:58
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    **VFP** is ARM's name for the FPU. The *vector* is a historical naming that is still kept. Cores can be **VFP** only or **NEON/VFP** systems, where you should always read **VFP** as just **FPU**. As silicon becomes cheaper, most modern ARM cpus have both NEON/VFP. But as always, consult the specific CPU documentation! – artless noise Feb 04 '21 at 17:21
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    As it relates to *gcc*, the options are [here](https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html). ‘vfpv2’, ‘vfpv3’, etc. Gcc must generate code for the FPU on the ARM; as well, there is a parameter passing convention for floating point. This is the `-mfloat-abi` option. It is different from the physical FPU. Are you confusing these concepts? – artless noise Feb 04 '21 at 18:24
  • @artlessnoise "VFP is ARM's name for the FPU" This helps a lot. The most confusing part was my thought of "Well VFP looks like ARM's FPU but... not really like it because if it were, why would we give `-mfloat-abi=softfp` instead of just `-mfloat-abi=hard`?" But reading the answer and your comment, I guess it's because the calling convention somewhat differs from third-party PFUs since VFP is a coprocessor. Is this correct? – morimn Feb 05 '21 at 06:41
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    As the ARM 'vfp' was a co-processor originally and an optional component, some system would have a 'vfp' and other would not. In order to accommodate this, an ABI (was to call functions) was invented that did not require floating point registers as an argument convention. All arguments are passed in regular registers. However, this was inefficient when a system is known to have a 'vfp'. Since most are application processor from ARMv6 and onward have a 'vfp', many systems use the exclusive `-mfloat-abi=hard`. – artless noise Feb 05 '21 at 12:24

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ARM fpus have evolved over time one period of time the term was VFP. The assembly language instructions are still supported AFAIK. (I do not use the new assembly language I use the older stuff on various cores, now what I use may not be the VFP assembly it might be somewhere in the middle).

At the time and it still appears to be in the present the FPU is a coprocessor, a feature that perhaps did not take hold for third party vendors, but you could add coprocessors to the core and use the MRS/MSR instructions for acces. I have not looked today but at that time the VFP instructions were nothing more than MRS/MSR coprocessor access instructions. The assembly language took care of this so you could ask to add two registers and not have to know what the gory details were.

Floating point solutions for ARM (well and everyone else) have evolved over time and this term is no longer used in normal conversation (for ARM at least).

How it accelerates the processor is that it is additional logic (just like a cache accelerates a processor) that is connected to the processor and we the programmer offload this work to that coprocessor. So we could use the normal ARM instruction set and do soft float operations which with fixed point math take a while, many instructions. Or you can pass the operation over to the coprocessor, where it's logic can do the work directly and give you a result much faster. Net result is overall better performance. Not unlike when speeding down the highway and asking the passenger to open a beer for you, you are offloading that work...

For the case of ARM the floating point instructions map into the core as instructions that are aimed at this logic be it a coprocessor like the old days or directly implemented in the core (if that is how it works today, I still need to enable a coprocessor in the ARM to enable the FPU so I suspect they are still coprocessors in some form).

How x86 and others do it is a separate topic, it may or may not be similar, certainly in the early days the 8087 was a separate coprocessor chip, but as with ARM these things have evolved. The best solution is to have the core be able to take the instructions directly, but you can still offload things and have an overall performance gain (think video cards).

Re-reading your question

From a current ARM document:

The Vector Floating-Point (VFP) architecture is a coprocessor extension to the ARM ® architecture. It provides single-precision and double-precision floating-point arithmetic, as defined by ANSI/IEEE Std. 754-1985 IEEE Standard for Binary Floating-Point Arithmetic. This document is referred to as the IEEE 754 standard in the following text.

and you can read from there this is the ARMv5 ARM ARM. Which is arm7/arm9 days.

When you see VFP with respect to ARM just think FPU or floating point instruction set. It is a coprocessor directly attached to the ARM core (if you paid for that and compiled it into your core) and the ARM core "executes" these instructions.

Because of the combinations of cores and features and what each chip vendor can and cannot do, specific combinations may not have a hard fpu and you have to use a soft fpu and the soft library may only support a certain instruction set.

old_timer
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  • Note the term VFP is still used in the armv7-m and armv7-ar documents. – old_timer Feb 04 '21 at 18:20
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    Also note that before the VFP was the FPA. But try to think of these as just instruction sets like thumb, thumb2, ARM, AARCH64, etc which may or may not overlap prior instruction sets (VFPv1, VFPv2... like thumbv1, thumbv2, thumbv3...armv4, armv5, armv6...). And as a result you should see logic exist as well as possibly soft fpus that emulate the functionality of the logic (for each). What the name itself means (FPA, VFP, SIMD, ...) is another story. Not something I worry about personally, show me the instructions and what they do...nuf said. – old_timer Feb 05 '21 at 07:46