In Vivado, how to "Create Port" in a "Block Design" that is mapped to a "Board Definition File" port for PicoZed

Question

Let's say I have some simple Verilog code for controlling an LED by turning it on and off every 1 second. I call it "blinker.v":

module blinker(
    input wire         sys_clk,
    input wire         sys_rst_n,

    output wire [3:0]  led
);
  //Insert code to Blink LEDs 0 to 3 on and off every 1 second...
endmodule

Then, in Vivado, I install the board definition files for a picozed board that defined all the IOs available for the FPGA to control and gives them a name. Next, i create a project using the picozed board that nows shows up under boards in create project, and add my blinker.v RTL code.

Finally, in Vivado, I create a top-level "board design", right click add "add module" and select "blinker" from the list which shows the verilog code block in vivado "block designer" GUI.

The problem I'm having is how to "Create Port" and select from a list of available IO ports that I can add based on the "board definition file"? I think the "Board defition file" defined a port called "LEDS[3:0]" already defined...so there must be a way to create this port on the "Block Designer" schematic so that I can connect it to the LED port of my "blinker" code block.

Any Vivado Designers know how to do this?

Why doesn't Vivado Show me a list of FPGA Ports that were defined in the "board definition file" to select from at this point? I could guess the name, but really I want to know the list of ports that I can use to connect to my verilog code....

Here is the board definition files from Avnet for picozed board:

Board.xml

<?xml version="1.0" encoding="UTF-8"?>

-<board preset_file="preset.xml" url="http://www.picozed.org" display_name="PicoZed 7030 SOM + FMC Carrier V2" name="picozed_7030_fmc2" vendor="em.avnet.com" schema_version="2.0">


-<images>


-<image display_name="PZ_PZCC_FMC_V2" name="PZCC-FMC-V2.jpg" sub_type="board">

<description>PZ plus PZCC-FMC-V2 Board File Image</description>

</image>

</images>


-<compatible_board_revisions>

<revision id="0">c</revision>

</compatible_board_revisions>

<file_version>1.1</file_version>

<description>PicoZed 7030 SOM + FMC Carrier V2</description>


-<components>


-<component display_name="PicoZed 7030 SOM + FMC Carrier V2" name="part0" vendor="xilinx" spec_url="http://www.picozed.org" pin_map_file="part0_pins.xml" part_name="xc7z030sbg485-1" type="fpga">


-<interfaces>


-<interface name="pl_pbs_5bits" type="xilinx.com:interface:gpio_rtl:1.0" preset_proc="pl_pbs_5bits_preset" of_component="pl_pbs_5bits" mode="master">

<description>5 push buttons</description>


-<preferred_ips>

<preferred_ip name="axi_gpio" vendor="xilinx.com" order="0" library="ip"/>

</preferred_ips>


-<port_maps>


-<port_map dir="in" right="0" left="4" physical_port="pl_pbs_5bits_tri_i" logical_port="TRI_I">


-<pin_maps>

<pin_map component_pin="pl_pbs_5bits_tri_i_0" port_index="0"/>

<pin_map component_pin="pl_pbs_5bits_tri_i_1" port_index="1"/>

<pin_map component_pin="pl_pbs_5bits_tri_i_2" port_index="2"/>

<pin_map component_pin="pl_pbs_5bits_tri_i_3" port_index="3"/>

<pin_map component_pin="pl_pbs_5bits_tri_i_4" port_index="4"/>

</pin_maps>

</port_map>

</port_maps>

</interface>


-<interface name="pl_leds_4bits" type="xilinx.com:interface:gpio_rtl:1.0" preset_proc="pl_leds_4bits_preset" of_component="pl_leds_4bits" mode="master">

<description>4 LEDs</description>


-<preferred_ips>

<preferred_ip name="axi_gpio" vendor="xilinx.com" order="0" library="ip"/>

</preferred_ips>


-<port_maps>


-<port_map dir="out" right="0" left="3" physical_port="pl_leds_4bits_tri_o" logical_port="TRI_O">


-<pin_maps>

<pin_map component_pin="pl_leds_4bits_tri_o_0" port_index="0"/>

<pin_map component_pin="pl_leds_4bits_tri_o_1" port_index="1"/>

<pin_map component_pin="pl_leds_4bits_tri_o_2" port_index="2"/>

<pin_map component_pin="pl_leds_4bits_tri_o_3" port_index="3"/>

</pin_maps>

</port_map>

</port_maps>

</interface>

<interface name="ps7_fixedio" type="xilinx.com:display_processing_system7:fixedio_rtl:1.0" preset_proc="ps7_preset" of_component="ps7_fixedio" mode="master"> </interface>


-<interface name="sys_clock" type="xilinx.com:interface:clock_rtl:1.0" of_component="sys_clock" mode="slave">


-<port_maps>


-<port_map dir="in" physical_port="sys_clk" logical_port="CLK">


-<pin_maps>

<pin_map component_pin="sys_clk" port_index="0"/>

</pin_maps>

</port_map>

</port_maps>


-<parameters>

<parameter name="frequency" value="100000000"/>

</parameters>

</interface>

</interfaces>

</component>

<component display_name="pl_pbs_5bits" name="pl_pbs_5bits" sub_type="push_button" type="chip" major_group="gpio"/>

<component display_name="pl_leds_4bits" name="pl_leds_4bits" sub_type="led" type="chip" major_group="gpio"/>

<component display_name="ps7_fixedio" name="ps7_fixedio" sub_type="fixed_io" type="chip" major_group=""/>

<component display_name="sys_clock" name="sys_clock" sub_type="system_clock" type="chip" major_group="clock"/>

</components>


-<jtag_chains>


-<jtag_chain name="chain1">

<position name="0" component="part0"/>

</jtag_chain>

</jtag_chains>


-<connections>


-<connection name="part0_pl_pbs_5bits" component2="pl_pbs_5bits" component1="part0">

<connection_map name="part0_pl_pbs_5bits_1" c2_end_index="4" c2_st_index="0" c1_end_index="4" c1_st_index="0"/>

</connection>


-<connection name="part0_pl_leds_4bits" component2="pl_leds_4bits" component1="part0">

<connection_map name="part0_pl_leds_4bits_1" c2_end_index="3" c2_st_index="0" c1_end_index="8" c1_st_index="5"/>

</connection>


-<connection name="part0_sys_clock" component2="sys_clock" component1="part0">

<connection_map name="part0_sys_clock_1" c2_end_index="0" c2_st_index="0" c1_end_index="9" c1_st_index="9"/>

</connection>

</connections>

</board>

FROM PICOZED BOARD DEFITION FILE:

board.xml:

<?xml version="1.0" encoding="UTF-8" standalone="no"?> 
<part_info part_name="xc7z030sbg485-1">
<pins>
  <pin index="0" name ="pl_pbs_5bits_tri_i_0" iostandard="LVCMOS18" loc="G2"/>
  <pin index="1" name ="pl_pbs_5bits_tri_i_1" iostandard="LVCMOS33" loc="T16"/>
  <pin index="2" name ="pl_pbs_5bits_tri_i_2" iostandard="LVCMOS33" loc="AB22"/>
  <pin index="3" name ="pl_pbs_5bits_tri_i_3" iostandard="LVCMOS33" loc="AB18"/>
  <pin index="4" name ="pl_pbs_5bits_tri_i_4" iostandard="LVCMOS33" loc="AB19"/>
  <pin index="5" name ="pl_leds_4bits_tri_o_0" iostandard="LVCMOS18" loc="G3"/>
  <pin index="6" name ="pl_leds_4bits_tri_o_1" iostandard="LVCMOS33" loc="AA19"/>
  <pin index="7" name ="pl_leds_4bits_tri_o_2" iostandard="LVCMOS33" loc="AA20"/>
  <pin index="8" name ="pl_leds_4bits_tri_o_3" iostandard="LVCMOS33" loc="AB21"/>
  <pin index="9" name ="sys_clk" iostandard="LVCMOS33" loc="Y18"/>
</pins>
</part_info>

part0_pins.xml

<?xml version="1.0" encoding="UTF-8" standalone="no"?> 
<part_info part_name="xc7z030sbg485-1">
<pins>
  <pin index="0" name ="pl_pbs_5bits_tri_i_0" iostandard="LVCMOS18" loc="G2"/>
  <pin index="1" name ="pl_pbs_5bits_tri_i_1" iostandard="LVCMOS33" loc="T16"/>
  <pin index="2" name ="pl_pbs_5bits_tri_i_2" iostandard="LVCMOS33" loc="AB22"/>
  <pin index="3" name ="pl_pbs_5bits_tri_i_3" iostandard="LVCMOS33" loc="AB18"/>
  <pin index="4" name ="pl_pbs_5bits_tri_i_4" iostandard="LVCMOS33" loc="AB19"/>
  <pin index="5" name ="pl_leds_4bits_tri_o_0" iostandard="LVCMOS18" loc="G3"/>
  <pin index="6" name ="pl_leds_4bits_tri_o_1" iostandard="LVCMOS33" loc="AA19"/>
  <pin index="7" name ="pl_leds_4bits_tri_o_2" iostandard="LVCMOS33" loc="AA20"/>
  <pin index="8" name ="pl_leds_4bits_tri_o_3" iostandard="LVCMOS33" loc="AB21"/>
  <pin index="9" name ="sys_clk" iostandard="LVCMOS33" loc="Y18"/>
</pins>
</part_info>

preset.xml

<?xml version="1.0" encoding="UTF-8"?>

-<ip_presets schema="1.0">


-<ip_preset preset_proc_name="ps7_preset">


-<ip version="*" name="processing_system7" library="ip" vendor="xilinx.com">


-<user_parameters>

<user_parameter name="CONFIG.PCW_PRESET_BANK0_VOLTAGE" value="LVCMOS 3.3V"/>

<user_parameter name="CONFIG.PCW_PRESET_BANK1_VOLTAGE" value="LVCMOS 1.8V"/>

<user_parameter name="CONFIG.PCW_PACKAGE_NAME" value="sbg485"/>

<user_parameter name="CONFIG.PCW_USE_M_AXI_GP0" value="1"/>

<user_parameter name="CONFIG.PCW_USE_M_AXI_GP1" value="0"/>

<user_parameter name="CONFIG.PCW_CRYSTAL_PERIPHERAL_FREQMHZ" value="33.333333"/>

<user_parameter name="CONFIG.PCW_APU_CLK_RATIO_ENABLE" value="6:2:1"/>

<user_parameter name="CONFIG.PCW_CPU_PERIPHERAL_CLKSRC" value="ARM PLL"/>

<user_parameter name="CONFIG.PCW_DDR_PERIPHERAL_CLKSRC" value="DDR PLL"/>

<user_parameter name="CONFIG.PCW_QSPI_PERIPHERAL_CLKSRC" value="IO PLL"/>

<user_parameter name="CONFIG.PCW_ENET0_PERIPHERAL_CLKSRC" value="IO PLL"/>

<user_parameter name="CONFIG.PCW_SDIO_PERIPHERAL_CLKSRC" value="IO PLL"/>

<user_parameter name="CONFIG.PCW_UART_PERIPHERAL_CLKSRC" value="IO PLL"/>

<user_parameter name="CONFIG.PCW_TTC0_CLK0_PERIPHERAL_CLKSRC" value="CPU_1X"/>

<user_parameter name="CONFIG.PCW_TTC0_CLK1_PERIPHERAL_CLKSRC" value="CPU_1X"/>

<user_parameter name="CONFIG.PCW_TTC0_CLK2_PERIPHERAL_CLKSRC" value="CPU_1X"/>

<user_parameter name="CONFIG.PCW_APU_PERIPHERAL_FREQMHZ" value="667"/>

<user_parameter name="CONFIG.PCW_UIPARAM_ACT_DDR_FREQ_MHZ" value="533.333333"/>

<user_parameter name="CONFIG.PCW_ENET0_PERIPHERAL_FREQMHZ" value="1000 Mbps"/>

<user_parameter name="CONFIG.PCW_SDIO_PERIPHERAL_FREQMHZ" value="25"/>

<user_parameter name="CONFIG.PCW_QSPI_PERIPHERAL_FREQMHZ" value="200.000000"/>

<user_parameter name="CONFIG.PCW_UART_PERIPHERAL_FREQMHZ" value="50"/>

<user_parameter name="CONFIG.PCW_USB0_PERIPHERAL_FREQMHZ" value="60"/>

<user_parameter name="CONFIG.PCW_TTC0_CLK0_PERIPHERAL_FREQMHZ" value="111.111115"/>

<user_parameter name="CONFIG.PCW_TTC0_CLK1_PERIPHERAL_FREQMHZ" value="111.111115"/>

<user_parameter name="CONFIG.PCW_TTC0_CLK2_PERIPHERAL_FREQMHZ" value="111.111115"/>

<user_parameter name="CONFIG.PCW_FCLK0_PERIPHERAL_CLKSRC" value="IO PLL"/>

<user_parameter name="CONFIG.PCW_FCLK1_PERIPHERAL_CLKSRC" value="IO PLL"/>

<user_parameter name="CONFIG.PCW_FCLK2_PERIPHERAL_CLKSRC" value="IO PLL"/>

<user_parameter name="CONFIG.PCW_FCLK3_PERIPHERAL_CLKSRC" value="IO PLL"/>

<user_parameter name="CONFIG.PCW_FCLK_CLK0_BUF" value="true"/>

<user_parameter name="CONFIG.PCW_FCLK_CLK1_BUF" value="false"/>

<user_parameter name="CONFIG.PCW_FCLK_CLK2_BUF" value="false"/>

<user_parameter name="CONFIG.PCW_FCLK_CLK3_BUF" value="false"/>

<user_parameter name="CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ" value="100"/>

<user_parameter name="CONFIG.PCW_FPGA1_PERIPHERAL_FREQMHZ" value="100"/>

<user_parameter name="CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ" value="33.333333"/>

<user_parameter name="CONFIG.PCW_FPGA3_PERIPHERAL_FREQMHZ" value="50"/>

<user_parameter name="CONFIG.PCW_EN_CLK0_PORT" value="1"/>

<user_parameter name="CONFIG.PCW_EN_CLK1_PORT" value="0"/>

<user_parameter name="CONFIG.PCW_EN_CLK2_PORT" value="0"/>

<user_parameter name="CONFIG.PCW_EN_CLK3_PORT" value="0"/>

<user_parameter name="CONFIG.PCW_EN_RST0_PORT" value="1"/>

<user_parameter name="CONFIG.PCW_EN_RST1_PORT" value="0"/>

<user_parameter name="CONFIG.PCW_EN_RST2_PORT" value="0"/>

<user_parameter name="CONFIG.PCW_EN_RST3_PORT" value="0"/>

<user_parameter name="CONFIG.PCW_EN_DDR" value="1"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_MEMORY_TYPE" value="DDR 3 (Low Voltage)"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_PARTNO" value="MT41K256M16 RE-125"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_DEVICE_CAPACITY" value="4096 MBits"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_BUS_WIDTH" value="32 Bit"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_BL" value="8"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_T_FAW" value="40.0"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_T_RC" value="48.75"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_CWL" value="6"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_DRAM_WIDTH" value="16 Bits"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_T_RAS_MIN" value="35.0"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_SPEED_BIN" value="DDR3_1066F"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM" value="33.621"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM" value="33.621"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM" value="48.166"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM" value="48.166"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_DQ_0_LENGTH_MM" value="38.671"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_DQ_1_LENGTH_MM" value="38.635"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_DQ_2_LENGTH_MM" value="38.671"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_DQ_3_LENGTH_MM" value="38.679"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_DQS_0_LENGTH_MM" value="38.200"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_DQS_1_LENGTH_MM" value="38.692"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_DQS_2_LENGTH_MM" value="38.778"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_DQS_3_LENGTH_MM" value="38.635"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_TRAIN_DATA_EYE" value="1"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL" value="1"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_TRAIN_READ_GATE" value="1"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0" value="-0.036"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1" value="-0.036"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2" value="0.058"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3" value="0.057"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY0" value="0.240"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY1" value="0.238"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY2" value="0.283"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY3" value="0.284"/>

<user_parameter name="CONFIG.PCW_UIPARAM_DDR_USE_INTERNAL_VREF" value="0"/>

<user_parameter name="CONFIG.PCW_QSPI_GRP_SINGLE_SS_IO" value="MIO 1 .. 6"/>

<user_parameter name="CONFIG.PCW_USB0_RESET_IO" value="MIO 7"/>

<user_parameter name="CONFIG.PCW_QSPI_GRP_FBCLK_IO" value="MIO 8"/>

<user_parameter name="CONFIG.PCW_SD1_SD1_IO" value="MIO 10 .. 15"/>

<user_parameter name="CONFIG.PCW_ENET0_ENET0_IO" value="MIO 16 .. 27"/>

<user_parameter name="CONFIG.PCW_USB0_USB0_IO" value="MIO 28 .. 39"/>

<user_parameter name="CONFIG.PCW_SD0_SD0_IO" value="MIO 40 .. 45"/>

<user_parameter name="CONFIG.PCW_SD0_GRP_CD_IO" value="MIO 46"/>

<user_parameter name="CONFIG.PCW_UART1_UART1_IO" value="MIO 48 .. 49"/>

<user_parameter name="CONFIG.PCW_ENET0_GRP_MDIO_IO" value="MIO 52 .. 53"/>

<user_parameter name="CONFIG.PCW_TTC0_TTC0_IO" value="EMIO"/>

<user_parameter name="CONFIG.PCW_QSPI_PERIPHERAL_ENABLE" value="1"/>

<user_parameter name="CONFIG.PCW_QSPI_GRP_FBCLK_ENABLE" value="1"/>

<user_parameter name="CONFIG.PCW_QSPI_GRP_SINGLE_SS_ENABLE" value="1"/>

<user_parameter name="CONFIG.PCW_USB0_PERIPHERAL_ENABLE" value="1"/>

<user_parameter name="CONFIG.PCW_USB0_RESET_ENABLE" value="1"/>

<user_parameter name="CONFIG.PCW_ENET0_PERIPHERAL_ENABLE" value="1"/>

<user_parameter name="CONFIG.PCW_ENET0_GRP_MDIO_ENABLE" value="1"/>

<user_parameter name="CONFIG.PCW_ENET0_RESET_ENABLE" value="0"/>

<user_parameter name="CONFIG.PCW_SD0_PERIPHERAL_ENABLE" value="1"/>

<user_parameter name="CONFIG.PCW_SD0_GRP_CD_ENABLE" value="1"/>

<user_parameter name="CONFIG.PCW_SD0_GRP_WP_ENABLE" value="0"/>

<user_parameter name="CONFIG.PCW_SD1_PERIPHERAL_ENABLE" value="1"/>

<user_parameter name="CONFIG.PCW_SD1_GRP_CD_ENABLE" value="0"/>

<user_parameter name="CONFIG.PCW_SD1_GRP_WP_ENABLE" value="0"/>

<user_parameter name="CONFIG.PCW_UART1_PERIPHERAL_ENABLE" value="1"/>

<user_parameter name="CONFIG.PCW_GPIO_PERIPHERAL_ENABLE" value="1"/>

<user_parameter name="CONFIG.PCW_GPIO_MIO_GPIO_ENABLE" value="1"/>

<user_parameter name="CONFIG.PCW_GPIO_EMIO_GPIO_ENABLE" value="0"/>

<user_parameter name="CONFIG.PCW_TTC0_PERIPHERAL_ENABLE" value="1"/>

<user_parameter name="CONFIG.PCW_I2C_RESET_ENABLE" value="0"/>

<user_parameter name="CONFIG.PCW_MIO_0_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_1_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_2_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_3_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_4_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_5_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_6_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_7_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_8_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_9_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_10_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_11_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_12_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_13_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_14_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_15_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_16_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_17_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_18_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_19_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_20_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_21_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_22_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_23_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_24_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_25_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_26_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_27_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_28_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_29_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_30_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_31_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_32_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_33_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_34_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_35_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_36_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_37_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_38_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_39_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_40_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_41_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_42_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_43_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_44_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_45_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_46_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_47_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_48_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_49_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_50_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_51_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_52_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_53_PULLUP" value="disabled"/>

<user_parameter name="CONFIG.PCW_MIO_0_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_1_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_2_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_3_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_4_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_5_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_6_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_7_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_8_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_9_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_10_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_11_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_12_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_13_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_14_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_15_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_16_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_17_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_18_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_19_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_20_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_21_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_22_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_23_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_24_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_25_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_26_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_27_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_28_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_29_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_30_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_31_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_32_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_33_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_34_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_35_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_36_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_37_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_38_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_39_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_40_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_41_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_42_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_43_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_44_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_45_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_46_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_47_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_48_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_49_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_50_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_51_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_52_SLEW" value="slow"/>

<user_parameter name="CONFIG.PCW_MIO_53_SLEW" value="slow"/>

</user_parameters>

</ip>

</ip_preset>


-<ip_preset preset_proc_name="pl_leds_4bits_preset">


-<ip name="axi_gpio" library="ip" vendor="xilinx.com" ip_interface="GPIO">


-<user_parameters>

<user_parameter name="CONFIG.C_GPIO_WIDTH" value="4"/>

<user_parameter name="CONFIG.C_ALL_OUTPUTS" value="1"/>

<user_parameter name="CONFIG.C_ALL_INPUTS" value="0"/>

</user_parameters>

</ip>


-<ip name="axi_gpio" library="ip" vendor="xilinx.com" ip_interface="GPIO2">


-<user_parameters>

<user_parameter name="CONFIG.C_IS_DUAL" value="1"/>

<user_parameter name="CONFIG.C_GPIO2_WIDTH" value="4"/>

<user_parameter name="CONFIG.C_ALL_OUTPUTS_2" value="1"/>

<user_parameter name="CONFIG.C_ALL_INPUTS_2" value="0"/>

</user_parameters>

</ip>


-<ip name="iomodule" library="ip" vendor="xilinx.com" ip_interface="GPIO1">


-<user_parameters>

<user_parameter name="CONFIG.C_USE_GPO1" value="1"/>

<user_parameter name="CONFIG.C_GPO1_SIZE" value="4"/>

</user_parameters>

</ip>


-<ip name="iomodule" library="ip" vendor="xilinx.com" ip_interface="GPIO2">


-<user_parameters>

<user_parameter name="CONFIG.C_USE_GPO2" value="1"/>

<user_parameter name="CONFIG.C_GPO2_SIZE" value="4"/>

</user_parameters>

</ip>


-<ip name="iomodule" library="ip" vendor="xilinx.com" ip_interface="GPIO3">


-<user_parameters>

<user_parameter name="CONFIG.C_USE_GPO3" value="1"/>

<user_parameter name="CONFIG.C_GPO3_SIZE" value="4"/>

</user_parameters>

</ip>


-<ip name="iomodule" library="ip" vendor="xilinx.com" ip_interface="GPIO4">


-<user_parameters>

<user_parameter name="CONFIG.C_USE_GPO4" value="1"/>

<user_parameter name="CONFIG.C_GPO4_SIZE" value="4"/>

</user_parameters>

</ip>


-<ip name="microblaze_mcs" library="ip" vendor="xilinx.com" ip_interface="GPIO1">


-<user_parameters>

<user_parameter name="CONFIG.USE_GPO1" value="1"/>

<user_parameter name="CONFIG.GPO1_SIZE" value="4"/>

</user_parameters>

</ip>


-<ip name="microblaze_mcs" library="ip" vendor="xilinx.com" ip_interface="GPIO2">


-<user_parameters>

<user_parameter name="CONFIG.USE_GPO2" value="1"/>

<user_parameter name="CONFIG.GPO2_SIZE" value="4"/>

</user_parameters>

</ip>


-<ip name="microblaze_mcs" library="ip" vendor="xilinx.com" ip_interface="GPIO3">


-<user_parameters>

<user_parameter name="CONFIG.USE_GPO3" value="1"/>

<user_parameter name="CONFIG.GPO3_SIZE" value="4"/>

</user_parameters>

</ip>


-<ip name="microblaze_mcs" library="ip" vendor="xilinx.com" ip_interface="GPIO4">


-<user_parameters>

<user_parameter name="CONFIG.USE_GPO4" value="1"/>

<user_parameter name="CONFIG.GPO4_SIZE" value="4"/>

</user_parameters>

</ip>

</ip_preset>


-<ip_preset preset_proc_name="pl_pbs_5bits_preset">


-<ip name="axi_gpio" library="ip" vendor="xilinx.com" ip_interface="GPIO">


-<user_parameters>

<user_parameter name="CONFIG.C_GPIO_WIDTH" value="5"/>

<user_parameter name="CONFIG.C_ALL_INPUTS" value="1"/>

<user_parameter name="CONFIG.C_ALL_OUTPUTS" value="0"/>

</user_parameters>

</ip>


-<ip name="axi_gpio" library="ip" vendor="xilinx.com" ip_interface="GPIO2">


-<user_parameters>

<user_parameter name="CONFIG.C_IS_DUAL" value="1"/>

<user_parameter name="CONFIG.C_GPIO2_WIDTH" value="5"/>

<user_parameter name="CONFIG.C_ALL_INPUTS_2" value="1"/>

<user_parameter name="CONFIG.C_ALL_OUTPUTS_2" value="0"/>

</user_parameters>

</ip>


-<ip name="iomodule" library="ip" vendor="xilinx.com" ip_interface="GPIO1">


-<user_parameters>

<user_parameter name="CONFIG.C_USE_GPI1" value="1"/>

<user_parameter name="CONFIG.C_GPI1_SIZE" value="5"/>

</user_parameters>

</ip>


-<ip name="iomodule" library="ip" vendor="xilinx.com" ip_interface="GPIO2">


-<user_parameters>

<user_parameter name="CONFIG.C_USE_GPI2" value="1"/>

<user_parameter name="CONFIG.C_GPI2_SIZE" value="5"/>

</user_parameters>

</ip>


-<ip name="iomodule" library="ip" vendor="xilinx.com" ip_interface="GPIO3">


-<user_parameters>

<user_parameter name="CONFIG.C_USE_GPI3" value="1"/>

<user_parameter name="CONFIG.C_GPI3_SIZE" value="5"/>

</user_parameters>

</ip>


-<ip name="iomodule" library="ip" vendor="xilinx.com" ip_interface="GPIO4">


-<user_parameters>

<user_parameter name="CONFIG.C_USE_GPI4" value="1"/>

<user_parameter name="CONFIG.C_GPI4_SIZE" value="5"/>

</user_parameters>

</ip>


-<ip name="microblaze_mcs" library="ip" vendor="xilinx.com" ip_interface="GPIO1">


-<user_parameters>

<user_parameter name="CONFIG.USE_GPI1" value="1"/>

<user_parameter name="CONFIG.GPI1_SIZE" value="5"/>

</user_parameters>

</ip>


-<ip name="microblaze_mcs" library="ip" vendor="xilinx.com" ip_interface="GPIO2">


-<user_parameters>

<user_parameter name="CONFIG.USE_GPI2" value="1"/>

<user_parameter name="CONFIG.GPI2_SIZE" value="5"/>

</user_parameters>

</ip>


-<ip name="microblaze_mcs" library="ip" vendor="xilinx.com" ip_interface="GPIO3">


-<user_parameters>

<user_parameter name="CONFIG.USE_GPI3" value="1"/>

<user_parameter name="CONFIG.GPI3_SIZE" value="5"/>

</user_parameters>

</ip>


-<ip name="microblaze_mcs" library="ip" vendor="xilinx.com" ip_interface="GPIO4">


-<user_parameters>

<user_parameter name="CONFIG.USE_GPI4" value="1"/>

<user_parameter name="CONFIG.GPI4_SIZE" value="5"/>

</user_parameters>

</ip>

</ip_preset>

</ip_presets>

EajksEajks · Answer 1 · 2020-11-21T17:52:58.377

Your files are pretty difficult to read. So I won't give you the exact command as it is pretty difficult to retrieve the exact signal names you need in your particular case.

Usually to be directly connected to a board pin(s), the pin(s) on the top-level module has to be of the same kind of IP-XACT interface (and declared as such when packaging you module as IP-XACT component). You would connect them with the following TCL command when using vivado in batch or console mode

apply_board_connection [-board_interface <arg>] -ip_intf <arg> -diagram <arg> [-quiet] [-verbose]

If it is not what you're doing but you're rather writing plain-old verilog or VHDL instead of using the IP flow, you can create on the top-level port a xdc constraint of the form

set_property BOARD_PIN {foo} [get_ports {foo}]

or

set_property -dict [list BOARD_PIN {foo}] [get_ports {foo}]

if you want to set several properties at once on the same port using a TCL list.

In Vivado, how to "Create Port" in a "Block Design" that is mapped to a "Board Definition File" port for PicoZed

1 Answers1