makefiles - the clean as target

Question

can anyone tell me how to execute the clean target which is written in the makefile. here is my code

jamm : hello.o ghola.o
    gcc $^ -o $@

%.o : %.c
    gcc -c S<

clean :  
    rm *.c

i have some questions.how to clean all those c files using the clean as target. we give the command make -f file1(say filename is file1) and it sees the target as jamm and execute but it wont execute the clean target.If in the command line i say make clean it says no such file or directory i'm unable to get this concept can anyone please tell me how to execute these clean when i have written in my make file.please guyss

it doesn't look like you have a clean target in that make file anyway — Pawel Veselov, Jun 23 '11 at 05:19
ok i do it but no matter how i try i dont know how to set it in a format — karthik, Jun 23 '11 at 05:23

score 4 · Answer 1 · answered Jun 23 '11 at 06:16

Check in your directory if you have a file named "clean". It might be that your make call thinks it must generate a "clean" file somehow.

To fix this, try to add just before your clean target a .PHONY indicator:

jamm : hello.o ghola.o
    gcc $^ -o $@

%.o : %.c
    gcc -c S<

# add this:
.PHONY: clean

clean :  
    rm *.c

BY THE WAY: YOUR CLEAN TARGET LOOKS BAD: shouldn't you delete the .o files instead of the .c ????

Dan · Answer 2 · 2011-06-23T16:45:18.837

In one of my makefiles, the clean target looks like this:

.PHONY: depend clean all new

clean:
    rm *.o *~ $(PROGS) ~/include/*.gch

Note that the line with the executable statement begins with a tab.

Some other things:

You probably don't want to rm your .c files. Those are your source files, and you could lose all your work coding them.
What you do want to remove are your object (.o in my example) and executable ($(PROGS) in my example, really any variable that contains the names of the executables) files, and precompiled headers (.gch), so you can remake from a clean slate.
Targets that don't actually produce a file by that name, like clean, should be listed as prerequisites of .PHONY. This lets make know that even if there is a file called clean, it should run the command anyway.
To execute a particular target (clean for example), just enter
```
make clean
```
but make sure that:
- You are in the same directory as your makefile
- Your makefile needs to be named Makefile or makefile. If you are using GNU make, you can also call it GNUmakefile

makefiles - the clean as target

2 Answers2