Error while using always block for half adder: sum is not a valid l-value

Question

module halfadder(a,B,sum,carry);
input a,B;
output sum,carry;
always@(a,B)
  begin
     sum=a^B;
     carry=a&B;
  end
endmodule

For the above code, I am getting error:

: sum is not a valid l-value in tb_halfadder.ha.
: sum is declared here as wire.
: carry is not a valid l-value in tb_halfadder.ha.
: carry is declared here as wire.

Anyway, your `always` is not really necessary. Your sensitivity list is `a,B`. Your assignments are `a^B` and `a&B`. The definition of `assign` is that the value of the RHS is calculated and assigned to the LHS **whenever any of the RHS operands change**. So simple assignments will work here just the same — Tomerikoo, Oct 22 '20 at 14:31

Light · Accepted Answer · 2020-10-22T14:31:24.487

0

sum and carry are not valid l-values because they are driven in a always block. They should be declared as reg.

reg sum, carry;

When a port is not declared with a type, it automatically gets a type of wire.

edited Oct 22 '20 at 14:31

answered Oct 22 '20 at 14:21

Light

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Or leave them as wires, but use `assign` and not `always`. – mkrieger1 Oct 22 '20 at 14:24
Well, `output reg sum, carry;` to be annoyingly technical... – Tomerikoo Oct 22 '20 at 14:32
@Tomerikoo I use this syntax only: `module halfadder(input a, ...`, for years. So I'm not sure if I can combine `output` and `reg` in the same line, if ports are declared outside that `()`. – Light Oct 22 '20 at 14:43
Well, I actually also use that syntax so now you made me wonder LOL – Tomerikoo Oct 22 '20 at 14:49
Actually declaring them as reg worked! Thank you :) – Kritika Dalal Oct 22 '20 at 15:12

Error while using always block for half adder: sum is not a valid l-value

1 Answers1