I am currently developing a small project for an STM32F103 microcontroller which features a Cortex-M3 CPU. Due to CMSIS standard header files it is possible to use the exact same code with IAR and Keil µVision. Because of that, I found it interesting to compare both compilers regarding code size (which is the most critical for small microcontrollers).
Both compilers were set on max. optimization level (for size). Unfortunately, I am not quite sure how IAR and Keil measure code size.
For example, IAR gives me this output:
868 bytes of readonly code memory
28 bytes of readonly data memory
2'056 bytes of readwrite data memory
and Keil this:
Program Size: Code=676 RO-data=252 RW-data=0 ZI-data=1640
At a first glance I am not able to detect which amount of bytes relates to used flash size and which to used SRAM.
Of course I know, that flash is Read-only and that SRAM is read-write but then there is code memory
and data memory
on IAR's side, and ZI-data
and Code
on Keil's side.
Anyone here who has more in depth knowledge about this?