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I am programming a Texas Instruments TMS320F28335 Digital Signal Controller (DSC) and I am writing the communication with a resolver model AD2S1205 (datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/AD2S1205.pdf). I have to implement the “Supply sequencing and reset” procedure and the procedure for reading and sending the speed and position values through the SPI serial interface back to the DSC. I'm new to firmware and there are several things I don't know how to do:

  1. In the resolver datasheet (page 16) you are asked to wait for the supply voltage Vdd to reach its operating range before moving the reset signal. How can I know when this happened?
  2. To ask the resolver to read and transmit the position and speed information, I must observe the time diagram (page 15), e.g. before putting /RD = 0 I have to wait for /RDVEL to remain stable for t4 = 5 ns. What should I insert in the code before the instruction that lowers RD to make sure that 5 ns have passed? I can pass 0,005 to the DELAY_US(A) function available on the DSC (which delays for A microseconds) but I don’t know if it will actually work and if this is the right way to go to observe device timing diagrams.
  3. In the “/RD input” section (page 14) it is specified that the high-to-low transition of /RD must occur when the clock is high. How can I be sure that the line of code that lowers /RD is running when the clock is high?
Ingen
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  • Do you rule out that hardware might be the answer? E.g. the external connected circuitry might have to be designed to ensure the "3." precondition. – Yunnosch Jul 28 '20 at 08:35
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    I’m voting to close this question because all points are purely/mainly hardware issues. – the busybee Jul 28 '20 at 08:49

1 Answers1

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  1. Connect chip Vdd to the ADC port via the divider. Reset the chip when Vdd is correct.
  2. Your uC is 150MHz. The clock period is 6.67ns which is larger than 4ns required. Whatever you do you cant change the pin faster. Problem does not exist for you.
  3. Connect CLKIN to the input pin. Poll it. Change /RD when clock high
0___________
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  • Additionally for 2. sometimes a simple NOP instruction will do. – Weather Vane Jul 28 '20 at 10:28
  • @WeatherVane even no NOP needed :). The problem is that OP even did not try to analyse the data from datasheet. – 0___________ Jul 28 '20 at 10:31
  • Yes, I meant in the general case, a NOP is usually sufficient. – Weather Vane Jul 28 '20 at 10:39
  • 1. Ok, thank you. 2. **As you can read in the datasheet** other delays are required, some of which **are larger** than the 6.67 ns clock period, like t_track or t9 (20 ms and 30 ns respectively). 3. Ok, but /RD has to change **when** the clock is high, I can’t change /RD and **then** clock high (like you said). What I can do is polling SCLK and lower /RD when SCLK is high but how can I know that the clock does not go low in the time that elapses between the execution of the polling instruction and the one that lowers /RD? – Ingen Jul 28 '20 at 10:52
  • Because you wait until you see the *transition* low to high. – Weather Vane Jul 28 '20 at 10:54
  • Nothing, as I wrote I was simply asking if using the function was the right way to go, since I was not sure since I am new to firmware. But what I got are just rude and annoyed answers, no people willing to help. Please remove this question since this is just sad. – Ingen Jul 28 '20 at 11:06
  • Where is my answer rude? You got all the answers. *`I can pass 0,005 to the DELAY_US(A) function available on the DSC`* - this question you need to answer yourself. I – 0___________ Jul 28 '20 at 11:17